System and method for zero-voltage detection in resonant pole inverters

Patent metadata

Field	Value
Publication number	US-12489377-B2
Application number	US-202318474807-A
Country	US
Kind code	B2
Filing date	Sep 26, 2023
Priority date	Sep 26, 2023
Publication date	Dec 2, 2025
Grant date	Dec 2, 2025

Abstract

A zero voltage detection device may include a voltage divider that scales down a first voltage to a second voltage, a comparator that compare the second voltage to one or more voltage thresholds and outputs a first set of signals indicative of an estimation of the first voltage approaching a zero-voltage instant, the one or more voltage thresholds configured to compensate for a time delay from the voltage divider, a flip flop that obtains the first set of signals and outputs a second set of signals to control a switching operation of a switching device, and a control system that obtains the second set of signals during a defined time window and that forces the switching device to turn on at an end of the defined time window if the second set of signals is not detected to limit turn-on losses.

First claim

What is claimed is:

1 . A device for performing zero voltage detection (ZVD) comprising:
a voltage divider,
wherein the voltage divider is configured to scale down a first voltage to a second voltage;
a comparator comprising:
a first comparator, and
a second comparator,
wherein the comparator compares the second voltage to one or more voltage thresholds and outputs a first set of signals indicative of an estimation of the first voltage approaching a zero-voltage instant, the one or more voltage thresholds configured to compensate for a time delay from the voltage divider,
wherein the one or more voltage thresholds comprises a first voltage threshold and a second voltage threshold,
wherein the first comparator generates a first signal as output based on a comparison between the second voltage and the first voltage threshold,
wherein the second comparator generates a second signal as output based on a comparison between the second voltage and the second voltage threshold, and
wherein the first set of signals comprises the first signal and the second signal and is representative of an estimation of the zero-voltage instant;
a flip flop comprising:
a first logic gate device, and
a second logic gate device,
wherein each of an output of the first logic gate device and an output of the second logic gate device is connected to an input of the other of the first logic gate device and the second logic gate device, respectively, and
wherein the flip flop is configured to obtain the first set of signals and output a second set of signals to control a switching operation of a switching device; and
a control system,
wherein the control system is configured to obtain the second set of signals during a defined time window, and the control system forces the switching device to turn on at an end of the defined time window if the second set of signals is not detected to limit turn-on losses.

2 . The device according to claim 1 , wherein the voltage divider comprises:
a resistive divider comprising:
two or more resistors connected in series, and
a capacitive divider comprising:
two or more capacitors connected in series,
wherein each capacitor of the two or more capacitors is connected in parallel to a respective resistor of the two or more resistors.

3 . The device according to claim 2 , wherein the resistive divider defines the second voltage during a steady-state operation,
wherein the capacitive divider defines the second voltage during a voltage transition, and wherein a voltage ratio of the resistive divider is substantially equal to a voltage ratio of the capacitive divider.

4 . The device according to claim 1 , further comprising:
a damping resistor,
wherein the damping resistor is configured to reduce electromagnetic noise at the device to reduce turn-on losses.

5 . The device according to claim 1 , wherein the control system obtains the second set of signals and controls cycling of the switching device to be turned on/off.

6 . The device according to claim 1 , wherein the first set of signals is immune to electrical noise in the second voltage.

7 . A system comprising:
two or more switching devices; two or more ZVD devices, each ZVD device associated with a respective switching device of the two or more switching devices and comprising:
a voltage divider comprising:
a resistive divider comprising:
two or more resistors connected in series, and

a capacitive divider comprising:
two or more capacitors connected in series,

wherein the voltage divider scales down a first voltage to a second voltage,

a comparator comprising:
a first comparator, and
a second comparator,
wherein the comparator compares the second voltage to one or more voltage thresholds determined based on an expected zero-voltage instant and the comparator outputs a first set of signals indicative of an estimation of the second voltage approaching a zero-voltage instant to compensate for a time delay from the voltage divider,

a flip flop comprising:
a first logic gate device, and
a second logic gate device,
wherein the flip flop obtains the first set of signals and outputs a second set of signals to control a switching operation of the respective switching device,
wherein the one or more voltage thresholds comprises a first voltage threshold and a second voltage threshold,
wherein the first comparator compares the second voltage to the first voltage threshold of the one or more voltage thresholds and generates a first ZVD signal as output representative of an estimation of the zero-voltage instant of the second voltage,
wherein the second comparator compares the second voltage to the second voltage threshold of the one or more voltage thresholds and generates a second ZVD signal as output representative of the estimation of the zero-voltage instant of the second voltage,
wherein the first set of signals comprises the first ZVD signal and the second ZVD signal and is representative of an estimation of the zero-voltage instant, and
wherein each of an output of the first logic gate device and an output of the second logic gate device is connected to an input of the other of the first logic gate device and the second logic gate device, respectively; and

a control system,
wherein the control system is configured to obtain the second set of signals during a defined time window, and the control system forces the respective switching device to turn on at an end of the defined time window if the second set of signals is not detected to limit turn-on losses.

8 . The system according to claim 7 , further comprising:
a damping resistor,
wherein the damping resistor is configured to reduce electromagnetic noise at the two or more ZVD devices to reduce turn-on losses.

9 . The system according to claim 7 , wherein each capacitor of the two or more capacitors is connected in parallel to a respective resistor of the two or more resistors, and wherein the resistive divider defines the second voltage during a steady-state operation and the capacitive divider defines the second voltage during a voltage transition.

10 . The system according to claim 7 ,
wherein the second set of signals is configured to cycle the respective switching device to be turned on/off based on the first set of signals.

11 . The system according to claim 7 , wherein the control system obtains the second set of signals and controls cycling of the respective switching device to be turned on/off.

12 . The system according to claim 7 , wherein the first set of signals is immune to electrical noise in the second voltage.

13 . A method comprising:
obtaining, by a zero voltage detection (ZVD) device, a first voltage applied to a switching device as input; scaling down, by the ZVD device, the first voltage to a second voltage within a time delay; comparing, by the ZVD device, the second voltage to one or more voltage thresholds and generating a first set of signals as output indicative of an estimation of the first voltage approaching a zero-volt instant; generating, by the ZVD device, a second set of signals as output to cycle the switching device to be turned on/off based on the first set of signals; and forcing, by the ZVD device, the switching device to turn on if the second set of signals is not detected at an end of a defined time window to limit turn-on losses; wherein the one or more voltage thresholds are configured to compensate for the time delay, wherein the one or more voltage thresholds comprising a first voltage threshold and a second voltage threshold, wherein comparing the second voltage to the one or more volta

Assignees

• Abb Schweiz Ag

Inventors

• Aeloiza Eddy
• Chen Weiqiang
• Mandic Goran

Classifications

• H03K17/13

  Modifications for switching at zero crossing (generating an impulse at zero crossing H03K5/1536) · CPC title

• H03K5/1536

  Zero-crossing detectors (in measuring circuits G01R19/175) · CPC title

• H02M1/0058 Primary

  by employing soft switching techniques, i.e. commutation of transistors when applied voltage is zero or when current flow is zero (using an auxiliary actively switched resonant commutation circuit connected to an intermediate DC voltage or between two push-pull branches of an inverter bridge H02M7/4811; in resonant inverters H02M7/4815; in inverters operating from a resonant DC source H02M7/4826) · CPC title

• H02M7/4815

  Resonant converters (H02M7/4811 and H02M7/4826 take precedence) · CPC title

• H03K17/133

  in field-effect transistor switches · CPC title