Vertical cavity surface emitting laser (VCSEL) emitter with guided-antiguided waveguide

Patent metadata

Field	Value
Publication number	US-12489273-B2
Application number	US-202217982204-A
Country	US
Kind code	B2
Filing date	Nov 7, 2022
Priority date	Nov 7, 2022
Publication date	Dec 2, 2025
Grant date	Dec 2, 2025

Abstract

A vertical cavity surface emitting laser (VCSEL) device comprising a VCSEL emitter having a waveguide with a guided portion and an antiguided portion is disclosed. The guided and antiguided portions may select and confine a mode of the VCSEL emitter. The antiguided portion may also be used to coherently couple adjacent VCSEL emitters.

First claim

What is claimed is:

1 . A semiconductor device, comprising:
an upper mirror; a lower mirror; and an active region and vertical cavity between the upper mirror and the lower mirror; wherein the vertical cavity defines a waveguide comprising a guided portion and an antiguided portion between the upper mirror and the lower mirror; wherein the guided portion comprises a tunnel junction aperture; and wherein the antiguided portion comprises a p-n blocking layer aperture.

2 . The semiconductor device of claim 1 , wherein:
the upper mirror comprises a distributed Bragg reflector; and the lower mirror comprises a distributed Bragg reflector.

3 . The semiconductor device of claim 1 , wherein:
the active region comprises a plurality of active layers; and each active layer comprises quantum wells, quantum dots, and/or quantum dashes.

4 . The semiconductor device of claim 3 , wherein the active region comprises a tunnel junction layer between adjacent active layers of the plurality of active layers.

5 . The semiconductor device of claim 1 , wherein the tunnel junction aperture has a greater lateral dimension than the p-n blocking layer.

6 . The semiconductor device of claim 1 , wherein the tunnel junction aperture has a smaller lateral dimension than the p-n blocking layer.

7 . A semiconductor device, comprising:
an array of VCSEL emitters; wherein each VCSEL emitter of the array of VCSEL emitters comprises:
an upper mirror;
a lower mirror; and
an active region and vertical cavity between the upper mirror and the lower mirror; and
wherein the vertical cavity defines a waveguide comprising a guided portion between the active region and the upper mirror and an antiguided portion between the active region and the lower mirror;
wherein the guided portion of each VCSEL emitter comprises a tunnel junction aperture; and wherein the antiguided portion of each VCSEL emitter comprises a p-n blocking layer aperture.

8 . The semiconductor device of claim 7 , wherein:
the upper mirror of each VCSEL emitter comprises a distributed Bragg reflector; the lower mirror of each VCSEL emitter comprises a distributed Bragg reflector; the active region of each VCSEL emitter comprises a plurality of active layers; and each active layer comprises quantum wells, quantum dots, and/or quantum dashes.

9 . The semiconductor device of claim 7 , wherein the antiguided portion of a first VCSEL emitter and the antiguided portion of a second VCSEL emitter adjacent to the first VCSEL emitter coherently couple the first VCSEL emitter to the second VCSEL emitter.

10 . The semiconductor device of claim 7 , wherein the antiguided portion of a first VCSEL emitter and the antiguided portion of a second VCSEL emitter adjacent to the first VCSEL emitter phase couple the first VCSEL emitter to the second VCSEL emitter.

11 . The semiconductor device of claim 7 , wherein:
the tunnel junction aperture of each VCSEL emitter comprises a p-n junction in reverse direction to current flow; and the p-n junction of each VCSEL emitter has a breakdown voltage greater than 5 Volts.

12 . The semiconductor device of claim 7 , wherein the tunnel junction aperture of each VCSEL emitter has a smaller lateral dimension than the p-n blocking layer for the respective VCSEL emitter.

13 . The semiconductor device of claim 7 , wherein the tunnel junction aperture of each VCSEL emitter has a greater lateral dimension than the p-n blocking layer for the respective VCSEL emitter.

14 . A method of forming a semiconductor device, the method comprising:
growing, via a first epitaxial process, a lower mirror on a top side of a substrate; growing, via the first epitaxial process, a p-n blocking layer on a top side of the lower mirror; forming an antiguided portion of a waveguide by etching, via a first lithographic process, the p-n blocking layer to form an aperture of the antiguided portion of the waveguide; growing, via a second epitaxial process, an active region over the antiguided portion of the waveguide; growing, via the second epitaxial process, a tunnel junction layer on a top side of the active region; forming a guided portion of the waveguide by etching, via a second lithographic process, the tunnel junction layer to form an aperture of the guided portion of the waveguide; and growing, via a third epitaxial process, an upper mirror over the guided portion of the waveguide.

15 . The method of claim 14 , wherein growing the lower mirror via the first epitaxial process comprises:
growing alternating high and low index of refraction layers to form a distributed Bragg reflector; and growing the upper mirror via the third epitaxial process comprising growing alternating high and low index of refraction layers to form a distributed Bragg reflector.

16 . The method of claim 14 , wherein growing the active region via the second epitaxial process comprises:
growing a first active layer comprising quantum wells, quantum dots, and/or quantum dashes; growing a tunnel junction layer on a top side of the first active layer; and growing a second active layer on a top side of the tunnel junction layer, wherein the second active layer comprises quantum wells, quantum dots, and/or quantum dashes.

17 . The method of claim 14 , wherein forming the antiguided portion coherently couples light of the active region with light of an adjacent active region.

18 . The method of claim 14 , wherein forming the guided portion of the waveguide forms the aperture of the guided portion such that its lateral dimension is greater than a lateral dimension of the aperture of the antiguided portion.

Assignees

• Ii Vi Delaware Inc

Inventors

• Zibik Evgeny
• Pissis Antoine
• Tirelli Stefano

Classifications

• H01S5/18308

  having a special structure for lateral current or light confinement · CPC title

• H01S2301/166

  Single transverse or lateral mode · CPC title

• H01S5/18361

  Structure of the reflectors, e.g. hybrid mirrors · CPC title

• H01S2301/20

  Lasers with a special output beam profile or cross-section, e.g. non-Gaussian · CPC title

• H01S5/18383

  with periodic active regions at nodes or maxima of light intensity · CPC title