Electronic device and control method thereof

US12488281B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-12488281-B2
Application numberUS-202117497193-A
CountryUS
Kind codeB2
Filing dateOct 8, 2021
Priority dateMar 10, 2020
Publication dateDec 2, 2025
Grant dateDec 2, 2025

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  1. Title

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  2. Abstract

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  5. First independent claim

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

An electronic device is disclosed. The electronic device may comprise: a memory in which information on a first artificial intelligence model learned through first learning data and information on a second artificial intelligence model learned through the first learning data are stored; and a processor connected to the memory to control the electronic device, wherein the processor is configured to: input second learning data to each of the first artificial intelligence model and the second artificial intelligence model and relearns the second artificial intelligence model on the basis of an output of each of a plurality of first layers included in the first artificial intelligence model and an output of each of a plurality of second layers included in the second artificial intelligence model, each of the plurality of first layers includes a plurality of two-dimensional filters, and each of the plurality of second layers includes a plurality of filters obtained by reducing the size of each of the plurality of two-dimensional filters of a corresponding first layer.

First claim

Opening claim text (preview).

What is claimed is: 1 . An electronic device comprising: memory storing information on a first artificial intelligence model trained through first learning data and information on a second artificial intelligence model trained through the first learning data; a communication interface; and a processor, comprising processing circuitry, connected to the memory and configured to control the electronic device, wherein the processor is configured to: input second learning data to each of the first artificial intelligence model and the second artificial intelligence model; retrain the second artificial intelligence model based on an output of each of a plurality of first layers included in the first artificial intelligence model and an output of each of a plurality of second layers included in the second artificial intelligence model; and control the communication interface to transmit the retrained second artificial intelligence model to an external device, wherein each of the plurality of first layers comprises a plurality of two-dimensional filters, wherein each of the plurality of second layers comprises a plurality of one-dimensional filters having a filter size reduced from each of a plurality of two-dimensional filters of corresponding first layer, wherein a number of the plurality of first layers is the same as a number of the plurality of second layers, and wherein a number of the plurality of two-dimensional filters included in each of the plurality of first layers is the same as a number of the plurality of one-dimensional filters included in the corresponding second layer, wherein each of the plurality of one-dimensional filters is in a form of 1×N or in a form of N×1, and wherein the processor is configured to: read input data from the memory in a row unit or a column unit; and input the read input data to the retrained second artificial intelligence model to process the input data. 2 . The device according to claim 1 , wherein the processor is configured to: obtain a plurality of comparison results by comparing the output of each of the plurality of first layers with the output of each corresponding second layer; and retrain the second artificial intelligence model based on the plurality of comparison results. 3 . The device according to claim 2 , wherein a size of the output of each of the plurality of first layers is the same as a size of the output of the corresponding second layer. 4 . The device according to claim 3 , wherein the memory stores information on a third artificial intelligence model trained to discriminate the output of each of the plurality of first layers from the output of each of the plurality of second layers, and wherein the processor is configured to: input the output of each of the plurality of second layers to each third artificial intelligence model; obtain a plurality of discrimination results for the outputs of the plurality of second layers output from the third artificial intelligence model; and retrain the second artificial intelligence model based on the plurality of comparison results and the plurality of discrimination results. 5 . The device according to claim 4 , wherein the processor is configured to: input the second learning data to each retrained second artificial intelligence model; and retrain the third artificial intelligence model to discriminate the output of each of the plurality of first layers from an output of each of a plurality of third layers included in the retrained second artificial intelligence model. 6 . The device according to claim 4 , wherein the processor is configured to retrain the second artificial intelligence model by weight-summing the plurality of comparison results and the plurality of discrimination results. 7 . The device according to claim 6 , wherein the processor is configured to retrain the second artificial intelligence model by applying a weight value of a comparison result corresponding to a final layer among the plurality of first layers to be equal to or greater than weight values of the plurality of comparison results corresponding to remaining layers. 8 . The device according to claim 1 , wherein the first artificial intelligence model and the second artificial intelligence model comprise a convolutional neural network (CNN). 9 . The device according to claim 1 , wherein the memory further stores information on an auxiliary artificial intelligence model trained through the first learning data, and wherein the processor is configured to: input the second learning data to the auxiliary artificial intelligence model; retrain the auxiliary artificial intelligence model based on the output of each of the plurality of first layers and an output of each of a plurality of auxiliary layers included in the auxiliary artificial intelligence model; input the second learning data to the retrained auxiliary artificial intelligence model; and retrain the second artificial intelligence model based on the output of each of the plurality of auxiliary layers included in the retrained auxiliary artificial intelligence model and the output of each of the plurality of second layers, and wherein each of the plurality of auxiliary layers comprises a plurality of filters having a filter size reduced from each of the plurality of two-dimensional filters of the corresponding first layer. 10 . The device according to claim 9 , wherein the memory further stores information on a first auxiliary artificial intelligence model trained through the first learning data and information on a second auxiliary artificial intelligence model trained through the first learning data, wherein the processor is configured to: input the second learning data to the first auxiliary artificial intelligence model and the second auxiliary artificial intelligence model; retrain the first auxiliary artificial intelligence model based on the output of each of the plurality of first layers and an output of each of a plurality of first auxiliary layers included in the first auxiliary artificial intelligence model; retrain the second auxiliary artificial intelligence model based on the output of each of the plurality of first layers and an output of each of a plurality of second auxiliary layers included in the second auxiliary artificial intelligence model; input the second learning data to the retrained first auxiliary artificial intelligence model and the retrained second auxiliary artificial intelligence model; and retrain the second artificial intelligence model based on the output of each of the plurality of first auxiliary layers included in the retrained first auxiliary artificial intelligence model, the output of each of the plurality of second auxiliary layers included in the retrained second auxiliary artificial intelligence model, and the output of each of the plurality of second layers, wherein each of the plurality of first auxiliary layers comprises a plurality of filters having a filter size reduced from each of the plurality of two-dimensional filters of the corresponding first layer, wherein each of the plurality of second auxiliary layers comprises a plurality of filters having a filter size reduced from each of the plurality of two-dimensional filters of the corresponding first layer, and wherein each of the plurality of filters included in each of the plurality of first auxiliary layers has a form different from the filter included in each of the corresponding second auxiliary layer. 11 . A method for controlling an electronic device, the method comprising: inputting second learning data to each of a first artificial intelligence model trained through first learning

Assignees

Inventors

Classifications

  • Knowledge representation; Symbolic representation · CPC title

  • G06N3/08Primary

    Learning methods · CPC title

  • Architecture, e.g. interconnection topology · CPC title

  • Convolutional networks [CNN, ConvNet] · CPC title

  • Adversarial learning · CPC title

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Frequently asked questions

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What does patent US12488281B2 cover?
An electronic device is disclosed. The electronic device may comprise: a memory in which information on a first artificial intelligence model learned through first learning data and information on a second artificial intelligence model learned through the first learning data are stored; and a processor connected to the memory to control the electronic device, wherein the processor is configured…
Who is the assignee on this patent?
Samsung Electronics Co Ltd, Univ Ajou Ind Academic Coop Found
What technology area does this patent fall under?
Primary CPC classification G06N3/08. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Dec 02 2025 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 12 related publications on this page (citations in our corpus or others sharing the same primary CPC).