To secure the charge at the center point

US12487696B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-12487696-B2
Application numberUS-202318232828-A
CountryUS
Kind codeB2
Filing dateAug 11, 2023
Priority dateFeb 13, 2021
Publication dateDec 2, 2025
Grant dateDec 2, 2025

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

The present invention applies a reset voltage to the center point prior to the progression of an event to ensure uniformity of the charge amount at the center point. It is possible to observe changes in the environment by supplying charge to the center point and detecting changes in the amount of charge. By varying the magnitude of the reset voltage for each object being measured, the observation range of the observation device is narrowed, thereby enhancing the observation resolution.

First claim

Opening claim text (preview).

What is claimed is: 1 . A capacitive detection device comprising: capacitive detection areas (CDAs), each comprising a conductor and an independent area, installed on an upper surface of a display device including a common electrode, and configured to form an object capacitance by facing an object vertically; sensing signal lines connected to the CDAs; a CDA column comprising a plurality of the CDAs arranged in a stacked configuration; a semiconductor IC, operating asynchronously with a video signal of the display device, and controlling an operation of the capacitive detection device to detect touch signals from the plurality of the CDAs; an operational amplifier installed inside the semiconductor IC and connected to the sensing signal lines; and a plurality of capacitors formed on the sensing signal lines, wherein a part of each CDA is peeled off as an empty space, wherein the number of signal lines connected to the CDAs forming the CDA column increases as the number of CDAs increases from a far distance to a near distance with respect to the semiconductor IC, and the area of the CDAs forming the CDA column gradually decreases as the number of CDAs increases from a far distance to a near distance, wherein the semiconductor IC selects an arbitrary nth CDA signal line, connected to an arbitrary nth CDA for detecting an object capacitance formed on the upper surface, as the sensing signal line in the CDA column, and selects at least one of the (n−1)th and (n+1)th CDA signal lines in the same CDA column as a driving signal line, wherein the semiconductor IC applies a first stage driving voltage and a second stage driving voltage to the one or more driving signal lines, and applies a reset voltage to the sensing signal line to detect an added capacitance, and wherein, at a time when the first stage driving voltage is applied, a reset voltage having a different potential from the driving voltage is selected from a reset voltage source including a plurality of reset voltages, and is applied to all of the sensing signal lines. 2 . The capacitive detection device of claim 1 , wherein the reset voltage is a voltage supplied from a device that supplies a plurality of reset voltages. 3 . The capacitive detection device according to claim 1 , wherein the reset voltage of a different size is supplied for each of the CDAs. 4 . The capacitive detection device of claim 1 , wherein the CDAs are concentrated in an orthogonal direction to form a column, and the reset voltage of a different size is applied to the sensing signal lines connected to the CDAs of different rows. 5 . The capacitive detection device of claim 1 , wherein the reset voltage is same as the first stage driving voltage. 6 . The capacitive detection device of claim 1 , wherein the reset voltage is applied to the sensing signal lines when the first stage driving voltage is applied to the driving signal line, and the reset voltage is removed from the sensing signal lines before the second stage driving voltage is applied to the driving signal line. 7 . The capacitive detection device of claim 1 , wherein the first stage driving voltage and the second stage driving voltage are different potentials. 8 . The capacitive detection device of claim 1 , wherein when the first stage driving voltage is lower than the second stage driving voltage, size of the reset voltage is a voltage lower than the second stage driving voltage. 9 . The capacitive detection device of claim 1 , wherein when the first stage driving voltage is higher than the second stage driving voltage, size of the reset voltage is a voltage higher than the second stage driving voltage. 10 . The capacitive detection device of claim 1 , wherein one of the capacitors is a shielding capacitor. 11 . The capacitive detection device of claim 10 , wherein the shielding capacitor is a capacitor formed facing the sensing signal lines and a shielding area created in an upper layer or lower layer of the semiconductor IC where the sensing signal lines are placed when the sensing signal lines are connected to the operational amplifier. 12 . The capacitive detection device of claim 1 , wherein the sensing signal lines are connected to one input terminal of the operational amplifier, and a digital-to-analog converter (DAC) is connected to other input terminal of the operational amplifier. 13 . The capacitive detection device of claim 12 , wherein the operational amplifier outputs difference between the voltage of the sensing signal lines connected to an input terminal of the operational amplifier and a voltage output of the DAC connected to the other input terminal, and the voltage output from the operational amplifier is digitally processed by an Analogue Digital Converter (ADC) and stored in a memory. 14 . The capacitive detection device of claim 13 , wherein the voltage output from the operational amplifier is stored in a sample and hold, and the voltage stored in the sample and hold is digitally processed by the ADC and stored in the memory.

Assignees

Inventors

Classifications

  • Shielding in digitiser, i.e. guard or shielding arrangements, mostly for capacitive touchscreens, e.g. driven shields, driven grounds · CPC title

  • Digitisers structurally integrated in a display · CPC title

  • using a single layer of sensing electrodes · CPC title

  • G06F3/0446Primary

    using a grid-like structure of electrodes in at least two directions, e.g. using row and column electrodes · CPC title

  • Multi-touch detection in digitiser, i.e. details about the simultaneous detection of a plurality of touching locations, e.g. multiple fingers or pen and finger · CPC title

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What does patent US12487696B2 cover?
The present invention applies a reset voltage to the center point prior to the progression of an event to ensure uniformity of the charge amount at the center point. It is possible to observe changes in the environment by supplying charge to the center point and detecting changes in the amount of charge. By varying the magnitude of the reset voltage for each object being measured, the observati…
Who is the assignee on this patent?
Lee Sung Ho
What technology area does this patent fall under?
Primary CPC classification G06F3/0446. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Dec 02 2025 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 12 related publications on this page (citations in our corpus or others sharing the same primary CPC).