Low dropout regulator

Patent metadata

Field	Value
Publication number	US-12487621-B2
Application number	US-202318180868-A
Country	US
Kind code	B2
Filing date	Mar 9, 2023
Priority date	Oct 18, 2022
Publication date	Dec 2, 2025
Grant date	Dec 2, 2025

Abstract

A low dropout regulator includes output terminal circuit and amplifier. The output terminal circuit is configured to generate output voltage according to input voltage and is configured to generate feedback voltage according to the output voltage. The amplifier is configured to generate control voltage to the output terminal circuit according to reference voltage and the feedback voltage, so as to adjust the output voltage, wherein the amplifier includes input stage circuit, current mirror circuit and filter circuit. The input stage circuit is configured to receive the reference voltage and the feedback voltage to generate a differential output. The filter circuit is configured to filter the input voltage to generate dependent current related to noise of the input voltage on the current mirror circuit, wherein the current mirror circuit is configured to output the control voltage according to the differential output and the dependent current.

First claim

What is claimed is:

1 . A low dropout regulator, comprising:
an output terminal circuit configured to generate an output voltage according to an input voltage and configured to generate a feedback voltage according to the output voltage; and an amplifier configured to generate a control voltage to the output terminal circuit according to a reference voltage and the feedback voltage, so as to adjust the output voltage, wherein the amplifier comprises:
an input stage circuit configured to receive the reference voltage and the feedback voltage to generate a differential output;
a current mirror circuit coupled to the input stage circuit; and
a filter circuit coupled to the current mirror circuit and configured to filter the input voltage to generate a dependent current related to a noise of the input voltage on the current mirror circuit, wherein the current mirror circuit is configured to output the control voltage according to the differential output and the dependent current.

2 . The low dropout regulator of claim 1 , wherein the current mirror circuit comprises a first transistor and a second transistor, a control terminal of the first transistor is coupled to the filter circuit, a first terminal of the first transistor is configured to receive a ground voltage, a second terminal of the first transistor is coupled to a first node, a control terminal of the second transistor is configured to receive a first bias voltage, a first terminal of the second transistor is configured to receive the ground voltage, and a second terminal of the second transistor is coupled to a second node.

3 . The low dropout regulator of claim 2 , wherein the current mirror circuit further comprises a third transistor and a fourth transistor, a control terminal of the third transistor and a control terminal of the fourth transistor are coupled to a third node, and a first terminal of the third transistor and a first terminal of the fourth transistor are configured to receive the input voltage.

4 . The low dropout regulator of claim 3 , wherein the current mirror circuit is configured to generate a replica current on a second terminal of the fourth transistor according to a first reference current related to the dependent current.

5 . The low dropout regulator of claim 4 , wherein the current mirror circuit is configured to compare the replica current with a second reference current flowing to the second node and is configured to generate the control voltage according to a comparison result of the replica current and the second reference current.

6 . The low dropout regulator of claim 3 , wherein a second terminal of the third transistor is coupled to the third node, the third node is coupled to the first node, and a second terminal of the fourth transistor is coupled to the second node and a control terminal of a power transistor of the output terminal circuit.

7 . The low dropout regulator of claim 3 , wherein the current mirror circuit further comprises a fifth transistor, a sixth transistor, a seventh transistor and an eighth transistor, a second terminal of the third transistor is coupled to the third node through the fifth transistor, the third node is coupled to the first node through the seventh transistor, a second terminal of the fourth transistor is coupled to a fourth node through the sixth transistor, and the fourth node is coupled to the second node through the eighth transistor, wherein a control terminal of a power transistor of the output terminal circuit is coupled to the fourth node.

8 . The low dropout regulator of claim 7 , wherein a control terminal of the fifth transistor and a control terminal of the sixth transistor are configured to receive a second bias voltage, a control terminal of the seventh transistor and a control terminal of the eighth transistor are configured to receive a third bias voltage, the second bias voltage is greater than the third bias voltage, and the third bias voltage is greater than the first bias voltage.

9 . The low dropout regulator of claim 2 , wherein the filter circuit comprises a capacitor and a resistor, the capacitor is coupled between the control terminal of the first transistor and the input voltage, and the resistor is coupled between the control terminal of the first transistor and the first bias voltage.

10 . The low dropout regulator of claim 2 , wherein the output terminal circuit comprises a power transistor, and the power transistor is configured to generate the output voltage on a first output node of the output terminal circuit according to the input voltage and is configured to adjust the output voltage according to the control voltage.

11 . The low dropout regulator of claim 10 , wherein a control terminal of the power transistor is configured to receive the control voltage from the current mirror circuit, a first terminal of the power transistor is configured to receive the input voltage, and a second terminal of the power transistor is coupled to the first output node.

12 . The low dropout regulator of claim 10 , wherein the output terminal circuit further comprises a feedback circuit, and the feedback circuit is coupled to the first output node and is configured to generate the feedback voltage on a second output node of the output terminal circuit according to the output voltage.

13 . The low dropout regulator of claim 12 , wherein the feedback circuit comprises a first resistor and a second resistor, the first resistor is coupled between the first output node and the second output node, the second resistor is coupled between the second output node and the ground voltage, and the second output node is coupled to the input stage circuit.

14 . The low dropout regulator of claim 10 , wherein the amplifier further comprises a capacitor, and the capacitor is coupled between the second node and the first output node.

15 . The low dropout regulator of claim 2 , wherein the input stage circuit comprises a differential input transistor pair, the differential input transistor pair is coupled to the first node, the second node and a third node, a first input terminal of the differential input transistor pair is configured to receive the reference voltage, and a second input terminal of the differential input transistor pair is coupled to a feedback circuit of the output terminal circuit to receive the feedback voltage, wherein the differential input transistor pair is configured to generate the differential output according to the reference voltage and the feedback voltage.

16 . The low dropout regulator of claim 15 , wherein a control terminal of a first transistor of the differential input transistor pair is coupled to the first input terminal of the differential input transistor pair, a first terminal of the first transistor of the differential input transistor pair is coupled to the third node, a second terminal of the first transistor of the differential input transistor pair is coupled to the first node, a control terminal of a second transistor of the differential input transistor pair is coupled to the second input terminal, a first terminal of the second transistor of the differential input transistor pair is coupled to the third node, and a second terminal of the second transistor of the differential input transistor pair is coupled to the second node,
wherein the first transistor of the differential input transistor pair is configured to generate a first operating current of the differential output according to the reference voltage, and the second transistor of the differential input transistor pair is configured to generate a seco

Assignees

• Realtek Semiconductor Corp

Inventors

• Feng Yi
• Kao Hsueh-Yu

Classifications

• G05F3/26

  Current mirrors · CPC title

• G05F1/595

  semiconductor devices connected in series · CPC title

• G05F1/575 Primary

  characterised by the feedback circuit · CPC title

• G05F1/561 Primary

  Voltage to current converters (amplifiers H03F) · CPC title