Display substrate and manufacture method thereof, display device

Patent metadata

Field	Value
Publication number	US-12484392-B2
Application number	US-202117425007-A
Country	US
Kind code	B2
Filing date	Mar 12, 2021
Priority date	Apr 30, 2020
Publication date	Nov 25, 2025
Grant date	Nov 25, 2025

Abstract

A display substrate and a manufacture method thereof, and a display device are provided. The display substrate includes a display region and a peripheral region, the peripheral region includes a first scan driving circuit and a second scan driving circuit on a first side of the display region, the peripheral region further includes a binding region on a second side of the display region, the peripheral region includes an organic insulation layer, the organic insulation layer at least partially covers the first scan driving circuit and the second scan driving circuit, and includes a first groove that is in a strip shape and extends substantially along a first direction to expose a portion between the first scan driving circuit and the second scan driving circuit, and the first groove also extends from the first side to the second side and extends substantially along a second direction on the second side.

First claim

What is claimed is:

1 . A display substrate, comprising a display region and a peripheral region at a periphery of the display region, wherein the peripheral region comprises a first scan driving circuit and a second scan driving circuit that are on a first side of the display region, the first scan driving circuit is on a side of the second scan driving circuit close to the display region, the peripheral region further comprises a binding region on a second side, which is adjacent to the first side, of the display region, and the binding region comprises a plurality of contact pads, and the plurality of contact pads are configured to be connected with power lines;
the peripheral region comprises an organic insulation layer, the organic insulation layer at least partially covers the first scan driving circuit and at least partially covers the second scan driving circuit, and comprises a first groove that is partially in a strip shape and extends substantially along a first direction to expose a portion between the first scan driving circuit and the second scan driving circuit, and the first groove also extends from the first side to the second side and extends substantially along a second direction on the second side, and the second direction is different from intersects the first direction; the display substrate further comprises a base substrate, wherein the first scan driving circuit, the second scan driving circuit, and the organic insulation layer are on the base substrate, the display substrate further comprises a first power line of the power lines on the base substrate and in the peripheral region, and the first power line of the power lines comprises a first portion extending in the first direction and a second portion extending in the second direction on the second side, and in a direction perpendicular to the base substrate, the first groove at least partially overlaps with the first portion of the first power line of the power lines, the organic insulation layer further comprises a blocking wall at an edge of the first portion of the first power line of the power lines along the second direction, the first groove is disconnected at the blocking wall, and the blocking wall covers the edge of the first portion of the first power line of the power lines along the second direction.

2 . The display substrate according to claim 1 , further comprising a second power line of the power lines on the base substrate and in the peripheral region,
wherein in a direction perpendicular to the base substrate, the first groove does not overlap with the second power line of the power lines.

3 . The display substrate according to claim 2 , wherein the second power line of the power lines is on a side of the first power line of the power lines away from the display region, the second power line of the power lines comprises a first portion extending in the first direction and a second portion extending in the second direction on the second side,
at least part of the first groove is between the second portion of the first power line of the power lines and the second portion of the second power line of the power lines.

4 . The display substrate according to claim 3 , wherein the first portion of the first power line of the power lines and the first portion of the second power line of the power lines are electrically connected to the binding region.

5 . The display substrate according to claim 1 , wherein the display region comprises a pixel array, the pixel array comprises a plurality of sub-pixels arranged in an array, each of the plurality of sub-pixels comprises a row scan signal terminal, a light emitting control signal terminal, and a data signal terminal, which are configured to receive a row scan signal, a light emitting control signal, and a data signal, respectively, and is configured to work according to the row scan signal, the light emitting control signal, and the data signal,
the first scan driving circuit is a row scan driving circuit configured to provide the row scan signal, and the second scan driving circuit is a light emitting scan driving circuit configured to provide the light emitting control signal.

6 . The display substrate according to claim 2 , wherein the peripheral region further comprises an electrostatic discharge circuit electrically connected to one end of the first scan driving circuit and one end of the second scan driving circuit, respectively,
an orthographic projection of the first groove on a plane where the electrostatic discharge circuit is located passes through the electrostatic discharge circuit, and in the direction perpendicular to the base substrate, the first groove does not expose the electrostatic discharge circuit.

7 . The display substrate according to claim 1 , wherein a first width of a portion of the first groove on the first side is smaller than a second width of a portion of the first groove on the second side, and the second width is 2-3 times the first width.

8 . The display substrate according to claim 6 , wherein the display region comprises a pixel array, the pixel array comprises a plurality of sub-pixels arranged in an array, each of the plurality of sub-pixels comprises a light emitting device and a pixel drive circuit,
the pixel drive circuit is on the base substrate, and the display region further comprises a planarization layer on a side of the pixel drive circuit away from the base substrate, and the light emitting device is on a side of the planarization layer away from the base substrate, and the organic insulation layer and the planarization layer are arranged in a same layer.

9 . The display substrate according to claim 8 , wherein the first scan driving circuit, the second scan driving circuit, and the electrostatic discharge circuit are arranged in a same layer as the pixel drive circuit.

10 . The display substrate according to claim 8 , wherein the peripheral region further comprises a first barrier wall on a side of the second scan driving circuit away from the display region,
the organic insulation layer further comprises a second groove between the second scan driving circuit and the first barrier wall, and the second groove surrounds four sides of the display region.

11 . The display substrate according to claim 10 , wherein the peripheral region further comprises a second barrier wall on a side of the first barrier wall away from the display region,
the organic insulation layer further comprises a third groove between the first barrier wall and the second barrier wall, and the third groove surrounds the four sides of the display region.

12 . The display substrate according to claim 11 , wherein the organic insulation layer further comprises a fourth groove on a side of the second barrier wall away from the display region, and the fourth groove surrounds the four sides of the display region.

13 . The display substrate according to claim 11 , wherein the display region further comprises a pixel defining layer on a side of the planarization layer away from the pixel drive circuit and a spacer layer on a side of the pixel defining layer away from the planarization layer,
the first barrier wall is in a same layer as at least part of a group consisting of the organic insulation layer, the pixel defining layer, and the spacer layer.

14 . The display substrate according to claim 13 , wherein the second barrier wall is in a same layer as at least part of the group consisting of the organic insulation layer, the pixel defining layer, and the spacer layer, and in the direction perpendicular to the display substrate, a height of the second barri

Assignees

• Chengdu Boe Optoelect Tech Co
• Boe Technology Group Co Ltd
• Beijing Boe Technology Dev Co Ltd

Inventors

• Dai Jie
• Yu Pengfei
• Bai Lu
• Jiang Xiaofeng
• Zhang Hao
• Wang Siyu
• Yang Huijuan
• Zhang Xin

Classifications

• H10K59/873

  Encapsulations · CPC title

• H10K59/1201

  Manufacture or treatment · CPC title

• H10K59/122

  Pixel-defining structures or layers, e.g. banks · CPC title

• G09G2310/0262

  The addressing of the pixel, in a display other than an active matrix LCD, involving the control of two or more scan electrodes or two or more data electrodes, e.g. pixel voltage dependent on signals of two data electrodes · CPC title

• G09G2310/0251

  Precharge or discharge of pixel before applying new pixel voltage · CPC title