Signal transmission system

Patent metadata

Field	Value
Publication number	US-12483294-B2
Application number	US-202218722051-A
Country	US
Kind code	B2
Filing date	Dec 2, 2022
Priority date	Dec 20, 2021
Publication date	Nov 25, 2025
Grant date	Nov 25, 2025

Abstract

The signal transmission system comprises a transmitter circuit, a receiver circuit and a signal cable. A current divider is formed by a terminating resistor between the signal conductors of the signal cable. The transmitter circuit drives a loop current. When the receiver circuit input voltage has a voltage level above a first switching voltage threshold value, the output voltage assumes a first voltage level. The output voltage maintains the first voltage level when the input voltage is below the first switching voltage threshold value but above a second switching voltage threshold value. The transmitter circuit is configured to modulate the loop current with at least two different non-zero magnitudes at successive times. The first magnitude is greater than a first switching current threshold value and the second magnitude is less than the first switching current threshold value and greater than a second switching current threshold value.

First claim

The invention claimed is:

1 . A signal transmission system for digital signal transmission, comprising:
a transmitter circuit with a signal input and with a signal output; a receiver circuit with a signal input and with a signal output; and a signal cable for the electrical connection of the transmitter circuit and the receiver circuit, the signal cable having a pair of signal conductors and a terminating resistor electrically connecting the signal conductors at a receiver circuit side respective line end; wherein the signal output of the transmitter circuit and the signal input of the receiver circuit are electrically connected to one another by means of the signal cable such that a current loop involving the signal output of the transmitter circuit, the pair of signal conductors of the signal cable, and a current divider formed by the terminating resistor and the signal input of the receiver circuit is formed; wherein the transmitter circuit is configured to drive a loop current with a current magnitude and a predeterminable current direction in the current loop such that a signal voltage proportional to the magnitude of the loop current and a polarity dependent on the current direction of the loop current drops over the terminating resistor; wherein the receiver circuit is configured to convert an input voltage into a corresponding output voltage such that, when the input voltage exceeds a positive first switching voltage threshold, the output voltage assumes a positive first voltage level and that when the input voltage exceeds the positive first switching voltage threshold, the output voltage holds the first voltage level, respectively; wherein the receiver circuit has an hysteresis, namely a dependence of the output voltage both on the input voltage and on an instantaneous voltage level of the output voltage, such that the output voltage which has the first voltage level further holds the first voltage level even if the input voltage falls below the first switching voltage threshold but nevertheless remains above a second switching voltage threshold that is non-zero; wherein the transmitter circuit is configured to modulate a digital input signal present at its signal input onto the loop current; and wherein the transmitter circuit is configured to adjust the current of the loop current as a function of the digital input signal at the signal input such that the loop current is allowed to flow in a first current direction in the current loop when the digital input signal has a first signal state and that the loop current flowing in the first current direction has or can have at least two successively differing in each case non-zero positive currents, of which a positive first current magnitude is greater than a first switching current threshold, defined as a ratio of the first switching voltage threshold of the receiver circuit to the resistance value of the terminating resistor, and a second current magnitude less than the first switching current threshold but greater than a second switching current threshold, defined as a ratio of the second switching voltage threshold of the receiver circuit to the resistance value of the terminating resistor.

2 . The signal transmission system according to claim 1 ,
wherein the second switching voltage threshold is below the first switching voltage threshold; and/or wherein the first switching voltage threshold is not less than +5 mV (millivolts); and/or wherein the second switching voltage threshold is not greater than −5 mV (millivolts) and/or wherein the first and second switching voltage thresholds have the same magnitude; and/or wherein the first and second switching voltage thresholds representing different polarities of the input voltage have different signs from one another.

3 . The signal transmission system according claim 1 , wherein the transmitter circuit is configured to adjust the first current of the loop current flowing in the first current direction for a predetermined hold time of more than 0.1 μs and thereafter to set the second current of the loop current flowing in the first current direction for a duration of more than 0.5 μs, and/or for more than twice the duration of the first current and/or to keep it further set for as long as the digital input signal has the first signal state.

4 . The signal transmission system according to claim 1 , wherein the receiver circuit is configured to convert the input voltage into the output voltage such that the output voltage assumes a negative second voltage level at a negative input voltage with a voltage level falling below the second switching voltage threshold or that the output voltage has the second voltage level at an input voltage with a voltage level below the second switching voltage threshold.

5 . The signal transmission system according to claim 4 , wherein the receiver circuit or its hysteresis is configured in such a manner that an output voltage having the second voltage level further with an input voltage with a voltage level exceeding the second switching voltage threshold but remaining below the first switching voltage threshold.

6 . The signal transmission system according to claim 5 ,
wherein the transmitter circuit is configured to set the magnitude of the loop current as a function of the digital input signal at the signal input in such a manner that the loop current flowing in a second current direction opposite to the first current direction also has or can have at least two current magnitudes each different from zero negative which differ from one another in time sequence and of which a negative third current is less than the second switching current threshold and a fourth current is greater than the second switching current threshold but less than the first switching current threshold of the receiver circuit.

7 . The signal transmission system according to claim 6 , wherein the transmitting circuit is configured:
to adjust the third current of the loop current flowing in the second current direction for a predetermined hold time of more than 0.1 μs; and to set the fourth current of the loop current flowing in the second current direction for a duration of more than 0.5 μs, and/or to keep it further set for as long as the digital input signal has the second signal state.

8 . The signal transmission system according to claim 1 ,
wherein the transmitter circuit is configured to output an output signal at the signal output that conforms to ANSI/TIA/EIA-644-1995 and/or has symmetrical and/or differential voltage levels; and/or wherein the transmitter circuit is configured to convert a binary input signal supplied via the signal input into an output signal conforming to ANSI/TIA/EIA-644-1995; and/or wherein the transmitter circuit has an adjustable direct current source for driving the loop current; and/or wherein the transmitter circuit is designed as an LVDS driver; and/or wherein the receiver circuit is configured to receive an input signal at the signal input; and/or wherein the receiver circuit is configured to process an input signal supplied via the signal input; and/or wherein the receiver circuit is designed as an LVDS receiver; and/or wherein the receiver circuit has a Schmitt trigger for configuring or adjusting the hysteresis; and/or wherein the receiver circuit has a non-clock-controlled flip-flop which serves to configure or adjust the hysteresis; and/or wherein the signal cable is configured to transmit an output signal at the signal output of the transmitter circuit to the signal input of the receiver circuit; and wherein the signal cable has a transmission length of more than 30 m; and/or wherein each of the signal conductors of the signal cable has a length-specific ohmic res

Assignees

• Flowtec Ag

Inventors

• Buchschacher Pascal
• Huber Alex
• Schmid Hanspeter
• Tanner Werner

Classifications

• H03K3/037

  Bistable circuits · CPC title

• G05F1/46

  wherein the variable actually regulated by the final control device is DC (G05F1/625 takes precedence) · CPC title

• G01F23/2967

  for discrete levels · CPC title

• G01F15/068

  with electrical means (G01F15/063 takes precedence) · CPC title

• H04L25/0272

  Arrangements for coupling to multiple lines, e.g. for differential transmission · CPC title