Differential mode and common mode distortion cancellation circuitry

Patent metadata

Field	Value
Publication number	US-12483203-B2
Application number	US-202217894062-A
Country	US
Kind code	B2
Filing date	Aug 23, 2022
Priority date	Aug 23, 2022
Publication date	Nov 25, 2025
Grant date	Nov 25, 2025

Abstract

An electronic device may include wireless circuitry having one or more differential circuits. A differential circuit can include first and second input transistors, first and second degeneration components, and first and second distortion cancellation transistors cross-coupled with the first and second input transistors. The first distortion cancellation transistor can be configured to sense a voltage at the first input transistor and to produce corresponding currents for cancelling a differential mode harmonic distortion current flowing through the second input transistor and for cancelling a common mode harmonic distortion current flowing through the first input transistor. The second distortion cancellation transistor can be configured to sense a voltage at the second input transistor and to produce corresponding currents for cancelling a differential mode harmonic distortion current flowing through the first input transistor and for cancelling a common mode harmonic distortion current flowing through the second input transistor.

First claim

What is claimed is:

1 . A differential circuit comprising:
a first input transistor having a gate terminal configured to receive an input signal, a drain terminal coupled to a first output terminal of the differential circuit, and a source terminal; a first passive component having a first terminal coupled to the source terminal of the first input transistor and having a second terminal coupled to a power supply line; and a first distortion cancellation transistor having a gate terminal coupled to the gate terminal of the first input transistor and having a drain terminal directly coupled to the drain terminal of the first input transistor.

2 . The differential circuit of claim 1 further comprising:
a second input transistor having a gate terminal configured to receive the input signal, a drain terminal coupled to a second output terminal of the differential circuit, and a source terminal directly coupled to a source terminal of the first distortion cancellation transistor.

3 . The differential circuit of claim 2 further comprising:
a second passive component having a first terminal coupled to the source terminal of the second input transistor and having a second terminal coupled to the power supply line.

4 . The differential circuit of claim 3 further comprising:
a second distortion cancellation transistor having a gate terminal coupled to the gate terminal of the second input transistor and having a drain terminal coupled to the drain terminal of the second input transistor.

5 . The differential circuit of claim 4 wherein the second distortion cancellation transistor comprises a source terminal coupled to the source terminal of the first input transistor.

6 . The differential circuit of claim 5 wherein the first and second passive components comprise inductors.

7 . The differential circuit of claim 1 further comprising:
a capacitor having a first terminal coupled to the gate terminal of the first input transistor and having a second terminal configured to receive the input signal.

8 . The differential circuit of claim 7 further comprising:
a resistor coupled to a node between the gate terminal of the first input transistor and the first terminal of the capacitor.

9 . A differential circuit comprising:
a first input transistor having a gate terminal configured to receive an input signal, a drain terminal coupled to a first output terminal of the differential circuit, and a source terminal; a first passive component having a first terminal coupled to the source terminal of the first input transistor and having a second terminal coupled to a power supply line; and a first distortion cancellation component having a first terminal coupled to the gate terminal of the first input transistor and having a second terminal directly coupled to the drain terminal of the first input transistor.

10 . The differential circuit of claim 9 further comprising:
a second input transistor having a gate terminal configured to receive the input signal, a drain terminal coupled to a second output terminal of the differential circuit, and a source terminal directly coupled to a third terminal of the first distortion cancellation component.

11 . The differential circuit of claim 10 further comprising:
a second passive component having a first terminal coupled to the source terminal of the second input transistor and having a second terminal coupled to the power supply line.

12 . The differential circuit of claim 11 wherein the first and second passive components comprise degeneration inductors.

13 . The differential circuit of claim 10 further comprising:
a second distortion cancellation component having a first terminal coupled to the gate terminal of the second input transistor, a second terminal coupled to the drain terminal of the second input transistor, and a third terminal coupled to the source terminal of the first input transistor.

14 . The differential circuit of claim 13 wherein:
the first distortion cancellation component comprises a first distortion cancellation transistor having a gate terminal coupled to the gate terminal of the first input transistor, a drain terminal coupled to the drain terminal of the first input transistor, and a source terminal coupled to the source terminal of the second input transistor; and
the second distortion cancellation component comprises a second distortion cancellation transistor having a gate terminal coupled to the gate terminal of the second input transistor, a drain terminal coupled to the drain terminal of the second input transistor, and a source terminal coupled to the source terminal of the first input transistor.

15 . The differential circuit of claim 14 further comprising:
a first capacitor having a first terminal coupled to the gate terminal of the first distortion cancellation transistor and having a second terminal configured to receive the input signal;
a first resistor directly coupled to the first terminal of the first capacitor;
a second capacitor having a first terminal coupled to the gate terminal of the second distortion cancellation transistor and having a second terminal configured to receive the input signal;
a second resistor directly coupled to the first terminal of the second capacitor.

16 . A differential circuit comprising:
a first input transistor having a gate terminal configured to receive an input signal, a drain terminal coupled to a first output port of the differential circuit, and a source terminal; a second input transistor having a gate terminal configured to receive the input signal, a drain terminal coupled to a second output port of the differential circuit, and a source terminal; a first distortion cancellation component coupled to the first and second input transistors, the first distortion cancellation component being configured to produce currents for cancelling a differential mode harmonic distortion current flowing through the second input transistor and for cancelling a common mode harmonic distortion current flowing through the first input transistor based on a voltage at the gate terminal of the first input transistor; and a second distortion cancellation component coupled to the first and second input transistors, the second distortion cancellation components being configured to produce currents for cancelling a differential mode harmonic distortion current flowing through the first input transistor and for cancelling a common mode harmonic distortion current flowing through the second input transistor based on a voltage at the gate terminal of the second input transistor.

17 . The differential circuit of claim 16 further comprising:
a first degeneration inductor coupled to the source terminal of the first input transistor; and
a second degeneration inductor coupled to the source terminal of the second input transistor.

18 . The differential circuit of claim 17 wherein:
the first distortion cancellation component comprises a first distortion cancellation transistor having a gate terminal coupled to the gate terminal of the first input transistor, the first distortion cancellation component being smaller than the first input transistor; and
the second distortion cancellation component comprises a second distortion cancellation transistor having a gate terminal coupled to the gate terminal of the second input transistor, the second distortion cancellation transistor being smaller than the second input transistor.

19 . The differential circuit of claim 18 wherein:
the firs

Assignees

• Apple Inc

Inventors

• Elaasar Omar E

Classifications

• H03F1/3205

  in field-effect transistor amplifiers · CPC title

• H03F2200/451

  the amplifier being a radio frequency amplifier · CPC title

• H03F3/195

  in integrated circuits · CPC title

• H03F2203/45318

  the AAC comprising a cross coupling circuit, e.g. two extra transistors cross coupled · CPC title

• H03F3/45179

  using MOSFET transistors as the active amplifying circuit (H03F3/45278 takes precedence) · CPC title