Processor environment agnostic distributed basic input output system component management

Patent metadata

Field	Value
Publication number	US-12481507-B2
Application number	US-202418421066-A
Country	US
Kind code	B2
Filing date	Jan 24, 2024
Priority date	Jan 24, 2024
Publication date	Nov 25, 2025
Grant date	Nov 25, 2025

Abstract

A firmware management operation. The firmware management operation includes providing an information handling system with a distributed BIOS, the distributed BIOS including a BIOS component and a BIOS variable; identifying a processor environment installed on an information handling system from a plurality of processor environments; selecting a particular BIOS component based upon the processor environment installed on the information handling system; generating a particular BIOS variable based upon the processor environment installed on the information handling system; and, loading the particular BIOS component and particular BIOS variable on the information handling system, the loading being seamless regardless of the processor environment installed on the information handling system.

First claim

What is claimed is:

1 . A computer-implementable method for performing a firmware management operation, comprising:
providing an information handling system with a distributed BIOS, the distributed BIOS including a BIOS component and a BIOS variable; identifying a processor environment installed on an information handling system from a plurality of processor environments; selecting a particular BIOS component based upon the processor environment installed on the information handling system; generating a particular BIOS variable based upon the processor environment installed on the information handling system; and, loading the particular BIOS component and particular BIOS variable on the information handling system, the loading being seamless regardless of the processor environment installed on the information handling system; and wherein the particular BIOS component includes a unified BIOS bridge layer component.

2 . The method of claim 1 , wherein:
the loading includes executing a distributed decouple protocol, the distributed decouple protocol decoupling the BIOS component of the processor environment from other BIOS components, the distributed decouple protocol being used to generate a BIOS Bridge Layer Application program interface (BBL API) for the particular BIOS component of the processor environment.

3 . The method of claim 2 , wherein:
the distributed decouple protocol is used to perform a BIOS Bridge Layer operation.

4 . The method of claim 1 , wherein:
the unified BIOS bridge layer component includes a plurality of objects, each of the plurality of objects corresponding to a respective portion of the processor architecture.

5 . The method of claim 4 , wherein:
each of the plurality of objects includes a management layer, the management layer including a set of application program interfaces (APIs) corresponding to the processor architecture.

6 . A system comprising:
a processor; a data bus coupled to the processor; and a non-transitory, computer-readable storage medium embodying computer program code, the non-transitory, computer-readable storage medium being coupled to the data bus, the computer program code interacting with a plurality of computer operations and comprising instructions executable by the processor and configured for:
providing an information handling system with a distributed BIOS, the distributed BIOS including a BIOS component and a BIOS variable;
identifying a processor environment installed on an information handling system from a plurality of processor environments;
selecting a particular BIOS component based upon the processor environment installed on the information handling system;
generating a particular BIOS variable based upon the processor environment installed on the information handling system; and,
loading the particular BIOS component and particular BIOS variable on the information handling system, the loading being seamless regardless of the processor environment installed on the information handling system; and wherein
the particular BIOS component includes a unified BIOS bridge layer component.

7 . The system of claim 6 , wherein:
the loading includes executing a distributed decouple protocol, the distributed decouple protocol decoupling the BIOS component of the processor environment from other BIOS components, the distributed decouple protocol being used to generate a BIOS Bridge Layer Application program interface (BBL API) for the particular BIOS component of the processor environment.

8 . The system of claim 7 , wherein:
the distributed decouple protocol is used to perform a BIOS Bridge Layer operation.

9 . The system of claim 6 , wherein:
the unified BIOS bridge layer component includes a plurality of objects, each of the plurality of objects corresponding to a respective portion of the processor architecture.

10 . The system of claim 9 , wherein:
each of the plurality of objects includes a management layer, the management layer including a set of application program interfaces (APIs) corresponding to the processor architecture.

11 . A non-transitory, computer-readable storage medium embodying computer program code, the computer program code comprising computer executable instructions configured for:
providing an information handling system with a distributed BIOS, the distributed BIOS including a BIOS component and a BIOS variable; identifying a processor environment installed on an information handling system from a plurality of processor environments; selecting a particular BIOS component based upon the processor environment installed on the information handling system; generating a particular BIOS variable based upon the processor environment installed on the information handling system; and, loading the particular BIOS component and particular BIOS variable on the information handling system, the loading being seamless regardless of the processor environment installed on the information handling system; and wherein the particular BIOS component includes a unified BIOS bridge layer component.

12 . The non-transitory, computer-readable storage medium of claim 11 , wherein:
the loading includes executing a distributed decouple protocol, the distributed decouple protocol decoupling the BIOS component of the processor environment from other BIOS components, the distributed decouple protocol being used to generate a BIOS Bridge Layer Application program interface (BBL API) for the particular BIOS component of the processor environment.

13 . The non-transitory, computer-readable storage medium of claim 12 , wherein:
the distributed decouple protocol is used to perform a BIOS Bridge Layer operation.

14 . The non-transitory, computer-readable storage medium of claim 11 , wherein:
the unified BIOS bridge layer component includes a plurality of objects, each of the plurality of objects corresponding to a respective portion of the processor architecture.

15 . The non-transitory, computer-readable storage medium of claim 14 , wherein:
each of the plurality of objects includes a management layer, the management layer including a set of application program interfaces (APIs) corresponding to the processor architecture.

16 . The non-transitory, computer-readable storage medium of claim 11 , wherein:
the computer executable instructions are deployable to a client system from a server system at a remote location.

17 . The non-transitory, computer-readable storage medium of claim 11 , wherein:
the computer executable instructions are provided by a service provider to a user on an on-demand basis.

Assignees

• Dell Products Lp
• Dell Products

Inventors

• Kumar Ranjan
• Moorthy Gowtham
• Suryanarayana Shekar Babu

Classifications

• G06F9/541

  via adapters, e.g. between incompatible applications · CPC title

• G06F9/4401

  Bootstrapping (security arrangements therefor G06F21/57) · CPC title

• G06F9/4403 Primary

  Processor initialisation · CPC title