Systems and methods for prefetching data

Patent metadata

Field	Value
Publication number	US-12481458-B2
Application number	US-202318227739-A
Country	US
Kind code	B2
Filing date	Jul 28, 2023
Priority date	May 9, 2023
Publication date	Nov 25, 2025
Grant date	Nov 25, 2025

Abstract

Systems and methods for prefetching data are disclosed. A processor in communication with a storage device identifies a first address. The processor identifies a first setting associated with the first address. The processor issues a first command to a first storage medium of the storage device based on the first setting. The first command is for performing a first type of memory read. The storage device is configured to retrieve first data associated with the first address in the first storage medium, to a second storage medium of the storage device, based on the first command.

First claim

What is claimed is:

1 . A computing system comprising:
a storage device including:
a first storage medium, and
a second storage medium;
a processor configured to communicate with the storage device; a memory coupled to the processor, the memory storing instructions that, when executed by the processor, cause the processor to:
identify a first address;
identify a first prefetch strategy associated with the first address; and
issue a first command to the first storage medium based on the first prefetch strategy, wherein the first command is for performing a first type of prefetch, wherein the storage device is configured to retrieve first data associated with the first address in the first storage medium, to the second storage medium, based on the first command;
identify a second address;
identify a second prefetch strategy associated with the second address, the second prefetch strategy being different from the first prefetch strategy; and
issue a second command to the memory based on the second prefetch strategy, wherein the second command is for performing a second type of prefetch, wherein the memory is configured to retrieve second data associated with the second address based on the second command.

2 . The computing system of claim 1 , wherein the first address is identified in a prefetch instruction included in a program executed by the processor.

3 . The computing system of claim 1 , wherein the first storage medium includes non-volatile memory, and the second storage medium includes volatile memory.

4 . The computing system of claim 1 , wherein the first type of memory read includes:
issuing a first command to read data in the first address, wherein the processor is configured to issue a second command for performing a function during an interval in which the first command is pending.

5 . The computing system of claim 1 , wherein the first prefetch strategy is associated with a first type of memory read, and the second prefetch strategy is associated with a second type of memory read different from the first type of memory read.

6 . The computing system of claim 5 , wherein the second type of memory read includes a blocking memory read of the second address.

7 . The computing system of claim 1 , wherein the storage device includes a queue for storing the first address.

8 . The computing system of claim 7 , wherein the storage device includes a controller configured to:
retrieve the first address from the queue; retrieve the first data from the first storage medium based on the first address retrieved from the queue; and store the first data to the second storage medium.

9 . The computing system of claim 1 , wherein the first prefetch strategy is based on an access latency associated with the first storage medium.

10 . The computing system of claim 1 , wherein a value indicative of the first prefetch strategy is stored in a table containing a mapping of virtual addresses to physical addresses.

11 . A method comprising:
identifying, by a processor in communication with a storage device, a first address; identifying, by the processor, a first prefetch strategy associated with the first address; and issuing, by the processor, a first command to a first storage medium of the storage device based on the first prefetch strategy, wherein the first command is for performing a first type of prefetch, wherein the storage device is configured to retrieve first data associated with the first address in the first storage medium, to a second storage medium of the storage device, based on the first command; identifying, by the processor, a second address; identifying, by the processor, a second prefetch strategy associated with the second address, the second prefetch strategy being different from the first prefetch strategy; and issuing, by the processor, a second command to a memory coupled to the processor based on the second prefetch strategy, wherein the second command is for performing a second type of prefetch, wherein the memory is configured to retrieve second data associated with the second address based on the second command.

12 . The method of claim 11 , wherein the first address is identified in a prefetch instruction included in a program executed by the processor.

13 . The method of claim 11 , wherein the first storage medium includes non-volatile memory, and the second storage medium includes volatile memory.

14 . The method of claim 11 , wherein the first type of memory read includes:
issuing a first command to read data in the first address, wherein the processor is configured to issue a second command for performing a function during an interval in which the first command is pending.

15 . The method of claim 11 , wherein the first prefetch strategy is associated with a first type of memory read, and the second prefetch strategy is associated with a second type of memory read different from the first type of memory read.

16 . The method of claim 15 , wherein the second type of memory read includes a blocking memory read of the second address.

17 . The method of claim 11 , wherein the storage device includes a queue for storing the first address.

18 . The method of claim 17 , wherein the storage device includes a controller, wherein the controller:
retrieves the first address from the queue; retrieves the first data from the first storage medium based on the first address retrieved from the queue; and stores the first data to the second storage medium.

19 . The method of claim 11 , wherein the first prefetch strategy is based on an access latency associated with the first storage medium.

20 . The method of claim 11 , wherein a value indicative of the first prefetch strategy is stored in a table containing a mapping of virtual addresses to physical addresses.

Assignees

• Samsung Electronics Co Ltd

Inventors

• Zhang Tong
• Li Zongwang
• Zhang Da
• Choi Byung
• Pitchumani Rekha
• Ki Yang Seok

Classifications

• G06F3/0673

  Single storage device · CPC title

• G06F3/0611

  in relation to response time · CPC title

• G06F3/0658

  Controller construction arrangements · CPC title

• G06F3/0656

  Data buffering arrangements · CPC title

• G06F3/068

  Hybrid storage device · CPC title