Techniques and driver circuits configured to monitor load current through a gate injection transistor (GIT)

Patent metadata

Field	Value
Publication number	US-12480980-B2
Application number	US-202318498912-A
Country	US
Kind code	B2
Filing date	Oct 31, 2023
Priority date	Oct 31, 2023
Publication date	Nov 25, 2025
Grant date	Nov 25, 2025

Abstract

This disclosure describes a driver circuit configured to control a gate injection transistor (GIT). The driver circuit is configured to output a control current to a gate of the GIT, detect a voltage at the gate of the GIT, and determine a load current through the GIT based on the voltage detected at the gate of the GIT. The voltage at the gate of the GIT may be dependent on both the load current and the control current.

First claim

The invention claimed is:

1 . A driver circuit configured to control a gate injection transistor (GIT), wherein the driver circuit is configured to:
output a control current to a gate of the GIT; detect a voltage at the gate of the GIT; and determine a load current through the GIT based on the voltage detected at the gate of the GIT, wherein the voltage at the gate of the GIT is dependent on both the load current and the control current, wherein to determine the load current, the driver circuit is configured to: compare the voltage detected at the gate to a fixed reference voltage; and determine the load current based on a pre-defined transfer function associated with the GIT, wherein the pre-defined transfer function defines both the load current through the GIT and the control current at the gate when the voltage detected at the gate is greater than a threshold defined in the pre-defined transfer function associated with the GIT.

2 . The driver circuit of claim 1 , wherein the driver circuit comprises:
a turn on circuit comprising a current delivery circuit, wherein the turn on circuit is configured to output the control current to turn on the GIT; a turn off circuit configured to short the control current to turn off the GIT; and a detection circuit configured to determine the load current through the GIT based on the voltage detected at the gate of the GIT.

3 . The driver circuit of claim 1 , wherein to determine the load current, the driver circuit is further configured to:
determine a total current though a portion of the GIT based on the voltage detected at the gate; and determine the load current based on a difference between the total current and the control current.

4 . The driver circuit of claim 1 , wherein to output the control current, the driver circuit is configured to:
output the control current in an initial boost phase, wherein the initial boost phase defines a first gate voltage; and output the control current in a drive phase that follows the boost phase, wherein the drive phase defines a second gate voltage that is lower than the first gate voltage, wherein to detect the voltage at the gate of the GIT, the driver circuit is configured to detect the second gate voltage.

5 . The driver circuit of claim 1 , wherein to output the control current, the driver circuit is configured to:
output the control current in an overload phase that occurs during a drive phase, wherein the driver circuit is configured to identify the overload phase based on the load current and disable the control current in response to identifying the overload phase.

6 . The driver circuit of claim 1 , wherein the driver circuit is further configured to determine a temperature associated with the GIT based on the load current.

7 . A driver circuit configured to control a gate injection transistor (GIT), wherein the driver circuit is configured to:
output a control current to a gate of the GIT; detect a voltage at the gate of the GIT; determine a load current through the GIT based on the voltage detected at the gate of the GIT, wherein the voltage at the gate of the GIT is dependent on both the load current and the control current; and generate a reference voltage based on a voltage drop over a reference structure, wherein to generate the reference voltage, the driver circuit is configured to deliver a second current to the reference structure, wherein the second current matches the control current, and wherein the reference structure defines a resistance that matches a resistance of a portion of the GIT, wherein both the load current and the control current flow through the portion of the GIT.

8 . The driver circuit of claim 7 , wherein to determine the load current, the driver circuit is configured to:
compare the voltage detected at the gate to the reference voltage; and determine the load current based on comparing the voltage detected at the gate to the reference voltage.

9 . The driver circuit of claim 8 , wherein to determine the load current, the driver circuit is configured to:
determine a voltage drop associated with load current based on subtracting the reference voltage from the voltage detected at the gate; and determine the load current based on the voltage drop associated with the load current.

10 . A method performed by a gate driver circuit configured to control a gate injection transistor (GIT), the method comprising:
outputting a control current to a gate of the GIT; detecting a voltage at the gate of the GIT; and
determining a load current through the GIT based on the voltage detected at the gate of the GIT, wherein the voltage at the gate of the GIT is dependent on both the load current and the control current, wherein determining the load current includes:
comparing the voltage detected at the gate to a fixed reference voltage; and
determining the load current based on a pre-defined transfer function associated with the GIT, wherein the pre-defined transfer function defines both the load current through the GIT and the control current at the gate when the voltage detected at the gate is greater than a threshold defined in the pre-defined transfer function associated with the GIT.

11 . The method of claim 10 , wherein determining the load current based on the pre-defined function includes:
determining a total current though a portion of the GIT based on the voltage detected at the gate; and determining the load current based on a difference between the total current and the control current.

12 . The method of claim 10 , wherein outputting the control current includes:
outputting the control current in an initial boost phase, wherein the initial boost phase defines a first gate voltage; and outputting constant current in a drive phase that follows the boost phase, wherein the drive phase defines a second gate voltage that is lower than the first gate voltage, wherein detecting the voltage at the gate of the GIT comprises detecting the second gate voltage.

13 . A method performed by a gate driver circuit configured to control a gate injection transistor (GIT), the method comprising:
outputting a control current to a gate of the GIT; detecting a voltage at the gate of the GIT;
determining a load current through the GIT based on the voltage detected at the gate of the GIT, wherein the voltage at the gate of the GIT is dependent on both the load current and the control current; and
generating a reference voltage based on a voltage drop over a reference structure,
wherein generating the reference voltage comprises delivering a second current to the reference structure, wherein the second current matches the control current,
wherein the reference structure defines a resistance that matches a resistance of a portion of the GIT, and
wherein both the load current and the control current flow through the portion of the GIT.

14 . The method of claim 13 , wherein determining the load current comprises:
comparing the voltage detected at the gate to the reference voltage; and determining the load current based on comparing the voltage detected at the gate to the reference voltage.

15 . The method of claim 14 , wherein determining the load current comprises:
determining a voltage drop associated with load current based on subtracting the reference voltage from the voltage detected at the gate; and determining the load current based on the voltage drop associated with the load current.

16 . A system comprising:
a gate injection transistor (GIT) configured to be controlled by a current signal

Assignees

• Infineon Technologies Ag

Inventors

• Nuebling Marcus
• Weiss Peter
• Novak Christian
• Bauer Christoph

Classifications

• G01R19/16533 Primary

  characterised by the application · CPC title