Insulated-gate transistor
US-2020335622-A1 · Oct 22, 2020 · US
US12477774B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-12477774-B2 |
| Application number | US-202318158689-A |
| Country | US |
| Kind code | B2 |
| Filing date | Jan 24, 2023 |
| Priority date | Mar 29, 2022 |
| Publication date | Nov 18, 2025 |
| Grant date | Nov 18, 2025 |
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A semiconductor device includes a main element and a sensing element each including a drift region of a first conductivity-type, a well region of a second conductivity-type provided at an upper part of the drift region, a first main electrode region of the first conductivity-type provided at an upper part of the well region, a gate electrode buried with a gate insulating film interposed in a trench, and a main electrode connected to the first main electrode region, the isolation region including an element-isolation insulating film provided on a top surface of a semiconductor base body interposed between the well regions, and a first wire provided on a top surface of the element-isolation insulating film and electrically connected to the main electrode of the main element.
Opening claim text (preview).
The invention claimed is: 1 . A semiconductor device comprising: a main element; a sensing element configured to detect a current of the main element; and an isolation region isolating the main element and the sensing element from each other, each of the main element and the sensing element including a drift region of a first conductivity-type provided in a semiconductor base body, a well region of a second conductivity-type provided at an upper part of the drift region, a first main electrode region of the first conductivity-type provided at an upper part of the well region, a gate electrode buried with a gate insulating film interposed in a trench in contact with the first main electrode region, the well region, and the drift region, and a main electrode electrically connected to the first main electrode region, the isolation region including an element-isolation insulating film provided on a top surface of the semiconductor base body interposed between the well region of the main element and the well region of the sensing element, and a first wire provided on a top surface of the element-isolation insulating film and electrically connected to the main electrode of the main element. 2 . The semiconductor device of claim 1 , wherein the first wire is isolated from each of a first gate wire connected to the gate electrode of the main element and a second gate wire connected to the gate electrode of the sensing element. 3 . The semiconductor device of claim 1 , wherein the main electrode of the main element extends onto the first wire so that the first wire is connected to the main electrode of the main element via a first contact. 4 . The semiconductor device of claim 2 , further comprising a gate runner connected to the first gate wire via a second contact and connected to the second gate wire via a third contact. 5 . The semiconductor device of claim 1 , further comprising a diode having a cathode connected to the first main electrode region of the main element and an anode connected to the first main electrode region of the sensing element. 6 . The semiconductor device of claim 1 , further comprising a diode having a cathode connected to the second main electrode region of the main element.
in antiparallel diode configurations · CPC title
Body regions of DMOS transistors or IGBTs (cell layout of DMOS H10D62/127) · CPC title
having trench gate electrodes, e.g. UMOS transistors · CPC title
having voltage-sensing or current-sensing structures, e.g. emulator sections or overcurrent sensing cells · CPC title
Recessed field plates, e.g. trench field plates or buried field plates · CPC title
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