Wideband amplifier

US12476594B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-12476594-B2
Application numberUS-202217824802-A
CountryUS
Kind codeB2
Filing dateMay 25, 2022
Priority dateMay 25, 2022
Publication dateNov 18, 2025
Grant dateNov 18, 2025

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A wideband amplifier includes an input matching network for matching a transconductor stage to an input impedance and includes an output matching network for matching the transconductor stage to an output impedance. Both the input and output matching networks each includes a parallel LC tank circuit arranged in parallel with a series LC tank circuit. The tank circuit arrangements configure the input and output matching networks to be resonant at a first frequency, a midrange frequency that is greater than the first frequency, and a second frequency that is greater than the midrange frequency to provide wideband matching.

First claim

Opening claim text (preview).

What is claimed is: 1 . An amplifier, comprising: a transconductor stage including a transconductor stage output node, the transconductor stage being configured to amplify an input signal; and an output matching network including: a first inductor having a first terminal coupled to the transconductor stage output node; an output transformer including a first coil electromagnetically coupled to a second coil, the first coil having a first terminal coupled to a reference voltage node and a second terminal coupled to a second terminal of the first inductor, the second coil being coupled to an amplifier output node; and a first capacitor coupled between the second terminal of the first inductor and the reference voltage node. 2 . The amplifier of claim 1 , wherein the first capacitor is a variable capacitor, and wherein the reference voltage node is a power supply node for a power supply voltage. 3 . The amplifier of claim 1 , wherein the output matching network further includes a resistor coupled between the second terminal of the first inductor and the reference voltage node. 4 . The amplifier of claim 3 , wherein the resistor is a variable resistor. 5 . The amplifier of claim 1 , wherein the output matching network further includes: a second capacitor coupled between the transconductor stage output node and the reference voltage node. 6 . The amplifier of claim 5 , wherein the output matching network further includes: a resistor coupled between the transconductor stage output node and the reference voltage node. 7 . The amplifier of claim 6 , wherein the second capacitor is a variable capacitor and the resistor is a variable resistor. 8 . The amplifier of claim 1 , wherein an inductance of the first coil is greater than an inductance of the second coil. 9 . The amplifier of claim 1 , wherein the transconductor stage comprises: a first transconductor transistor, wherein an input node of the transconductor stage is formed by a gate of the first transconductor transistor; and a first cascode transistor having a source coupled to a drain of the first transconductor transistor and having a drain coupled to the transconductor stage output node. 10 . The amplifier of claim 9 , wherein the transconductor stage further comprises: a second transconductor transistor, wherein the input node of the transconductor stage is further formed by a gate of the second transconductor transistor, and a second cascode transistor having a source coupled to a drain of the second transconductor transistor and having a drain coupled to the transconductor stage output node. 11 . The amplifier of claim 9 , further comprising: a degeneration inductor coupled between a source of the first transconductor transistor and ground. 12 . The amplifier of claim 10 , further comprising: a bias generator configured to generate a first gate bias voltage for a gate of the first cascode transistor and configured to generate a second gate voltage for a gate of the second cascode transistor; and a controller configured to control the bias generator to adjust the first gate bias voltage and the second gate bias voltage to control a gain of the transconductor stage. 13 . The amplifier of claim 1 , wherein the output matching network further comprises a second capacitor coupled between the second coil and the amplifier output node. 14 . The amplifier of claim 1 , further comprising: an input matching network coupled between an amplifier input node and an input node of the transconductor stage. 15 . The amplifier of claim 14 , wherein the input matching network includes a second inductor coupled between ground and the amplifier input node; a capacitor having a first terminal and a second terminal, wherein the second terminal of the capacitor is coupled to the input node of the transconductor stage; and a third inductor coupled between the amplifier input node and the first terminal of the capacitor. 16 . The amplifier of claim 1 , wherein the amplifier comprises a low-noise amplifier integrated within a receiver comprising: a mixer coupled to the amplifier output node; an analog-to-digital converter; and a filter coupled between an output node of the mixer and an input node to the analog-to-digital converter. 17 . The amplifier of claim 1 , further comprising: a plurality of electrostatic discharge diodes coupled to the amplifier output node. 18 . The amplifier of claim 1 , further comprising: a plurality of electrostatic discharge diodes coupled to an amplifier input node of the amplifier. 19 . An amplification method, comprising: transconducting a first input voltage signal through a transconductor stage having an output capacitance to form a first output current signal; and driving the first output current signal into a parallel combination of a series inductor-capacitor tank circuit and a first parallel inductor-capacitor tank circuit, wherein the series inductor-capacitor tank circuit includes the output capacitance and an inductor coupled between a first coil of an output transformer and an output node of the transconductor stage and the first parallel inductor-capacitor tank circuit includes a capacitor arranged in parallel with the first coil of the output transformer, to cause both the series inductor-capacitor tank circuit and the first parallel inductor-capacitor tank circuit to be resonant at a midrange frequency to match an impedance of an amplifier output node at the midrange frequency to an output resistance of the transconductor stage, wherein the midrange frequency is greater than a first frequency and less than a second frequency. 20 . The method of claim 19 , wherein driving the first output current signal into the parallel combination of the series inductor-capacitor tank circuit and the first parallel inductor-capacitor tank circuit further comprises: causing the series inductor-capacitor tank circuit to function as a short circuit. 21 . The method of claim 19 , further comprising: transconducting a second input voltage signal through the transconductor stage to form a second output current signal; and driving the second output current signal into the parallel combination of the series inductor-capacitor tank circuit and the first parallel inductor-capacitor tank circuit to cause a combination of the first coil and the output capacitance to function as a second parallel inductor-capacitor tank circuit that is resonant at the first frequency to match an impedance of the amplifier output node at the first frequency to a product of the output resistance of the transconductor stage and a quality factor of the series inductor-capacitor tank circuit. 22 . The method of claim 21 , wherein driving the second output current signal into the parallel combination of the series inductor-capacitor tank circuit and the first parallel inductor-capacitor tank circuit further comprises: causing the second parallel inductor-capacitor tank circuit to function as an open circuit. 23 . The method of claim 21 , further comprising: transconducting a third input voltage signal through the transconductor stage to form a third output current signal; and driving the third output current signal into the parallel combination of the series inductor-capacitor tank circuit and the first parallel inductor-capacitor tank circuit to cause a combination of the capacitor and the inductor to function as a third parallel inductor-capacit

Assignees

Inventors

Classifications

  • Impedance-matching networks · CPC title

  • A circuit being added at the output of an amplifier to adapt the output impedance of the amplifier · CPC title

  • A matching circuit being used as coupling element between two amplifying stages · CPC title

  • the amplifier being a low noise amplifier [LNA] · CPC title

  • the input circuit of an amplifying stage comprising an LC-network · CPC title

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What does patent US12476594B2 cover?
A wideband amplifier includes an input matching network for matching a transconductor stage to an input impedance and includes an output matching network for matching the transconductor stage to an output impedance. Both the input and output matching networks each includes a parallel LC tank circuit arranged in parallel with a series LC tank circuit. The tank circuit arrangements configure the …
Who is the assignee on this patent?
Qualcomm Inc
What technology area does this patent fall under?
Primary CPC classification H03F1/565. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Nov 18 2025 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 5 related publications on this page (citations in our corpus or others sharing the same primary CPC).