Broadcasting power limiting management responses in a processor-based system in an integrated circuit (IC) chip

Patent metadata

Field	Value
Publication number	US-12475335-B2
Application number	US-202318339504-A
Country	US
Kind code	B2
Filing date	Jun 22, 2023
Priority date	Jun 22, 2023
Publication date	Nov 18, 2025
Grant date	Nov 18, 2025

Abstract

Broadcasting power limiting management responses in a processor-based system in an integrated circuit (IC) chip is disclosed herein. In one aspect, an IC chip comprises a processor-based system that includes a power estimation and limiting (PEL) circuit, a Limit Management Throughput Throttle (LMTT) source circuit, a plurality of activity management (AM) circuits, and an LMTT bus communicatively coupling the LMTT source circuit with each AM circuit of the plurality of AM circuits. The LMTT source circuit receives a power limiting management response from a PEL circuit via a communications network of the processor-based system, and generates an LMTT command based on the power limiting management response. The LMTT source circuit broadcasts the LMTT command to each AM circuit of the plurality of AM circuits via the LMTT bus.

First claim

What is claimed is:

1 . An integrated circuit (IC) chip comprising a processor-based system, the processor-based system comprising:
a power estimation and limiting (PEL) circuit; a Limit Management Throughput Throttle (LMTT) source circuit communicatively coupled to the PEL circuit via a communications network; a plurality of activity management (AM) circuits; and an LMTT bus communicatively coupling the LMTT source circuit with each AM circuit of the plurality of AM circuits; the LMTT source circuit configured to:
receive a power limiting management response from the PEL circuit via the communications network;
generate an LMTT command based on the power limiting management response; and
broadcast the LMTT command to each AM circuit of the plurality of AM circuits via the LMTT bus,
wherein the LMTT source circuit comprises a regional AM (RAM) circuit of the IC; and each AM circuit of the plurality of AM circuits comprises a local AM (LAM) circuit of the IC.

2 . The IC chip of claim 1 , wherein one or more AM circuits of the plurality of AM circuits is configured to:
receive the LMTT command from the LMTT source circuit via the LMTT bus; and perform a power throttling operation based on the LMTT command.

3 . The IC chip of claim 1 , wherein:
the LMTT bus comprises a three (3)-wired bus; and the LMTT command comprises:
an enable indication transmitted over a first wire of the three (3)-wired bus;
a throttle value indication transmitted over a second wire of the three (3)-wired bus; and
a throttle target indication transmitted over a third wire of the three (3)-wired bus.

4 . The IC chip of claim 3 , wherein:
the throttle value indication comprises a three (3)-bit value transmitted serially over the second wire of the three (3)-wired bus; and the throttle target indication comprises a two (2)-bit value transmitted serially over the third wire of the three (3)-wired bus.

5 . The IC chip of claim 1 , wherein:
the LMTT source circuit comprises a temperature sensor hub (THUB) circuit of the IC; and each AM circuit of the plurality of AM circuits comprises a local activity management (LAM) circuit of the IC.

6 . The IC chip of claim 1 , wherein:
the LMTT source circuit comprises a temperature sensor hub (THUB) circuit of the IC; and each AM circuit of the plurality of AM circuits comprises a regional AM (RAM) circuit of the IC.

7 . The IC chip of claim 1 , wherein:
the LMTT source circuit comprises a droop detection circuit of the IC; and each AM circuit of the plurality of AM circuits comprises a regional AM (RAM) circuit of the IC.

8 . The IC chip of claim 1 , integrated into a device selected from the group consisting of: a set top box; an entertainment unit; a navigation device; a communications device; a fixed location data unit; a mobile location data unit; a global positioning system (GPS) device; a mobile phone; a cellular phone; a smart phone; a session initiation protocol (SIP) phone; a tablet; a phablet; a server; a computer; a portable computer; a mobile computing device; a wearable computing device; a desktop computer; a personal digital assistant (PDA); a monitor; a computer monitor; a television; a tuner; a radio; a satellite radio; a music player; a digital music player; a portable music player; a digital video player; a video player; a digital video disc (DVD) player; a portable digital video player; an automobile; a vehicle component; avionics systems; a drone; and a multicopter.

Assignees

• Qualcomm Inc

Inventors

• KOORAPATI Sagar
• Chamarty Vinod
• Naveh Alon

Classifications

• Y02D10/00

  Energy efficient computing, e.g. low power processors, power management or thermal management · CPC title

• G06F13/4291

  using a clocked protocol · CPC title

• G06F1/324

  by lowering clock frequency · CPC title

• G06F1/3243

  Power saving in microcontroller unit · CPC title

• G06F1/3296

  by lowering the supply or operating voltage · CPC title