System-on-chip capable of changing signature verification algorithm and operating method of system-on-chip

Patent metadata

Field	Value
Publication number	US-12475061-B2
Application number	US-202418420212-A
Country	US
Kind code	B2
Filing date	Jan 23, 2024
Priority date	Jun 14, 2023
Publication date	Nov 18, 2025
Grant date	Nov 18, 2025

Abstract

A system-on-chip includes a nonvolatile memory configured to load a first image received from external storage and a first signature verification algorithm; at least one processor configured to control the nonvolatile memory such that first verifications are performed on the first image; a volatile memory; and a one-time programmable (OTP) memory configured to program a programmed hash value of a second signature verification algorithm different from the first signature verification algorithm. The at least one processor further is configured to: load a second image received from the external storage to the volatile memory, the second image being different from the first image; perform a second verification on the second image based on the programmed hash value; based on the second verification succeeding, execute the second signature verification algorithm corresponding to the version information; and perform the first verifications by applying the second signature verification algorithm to the first image.

First claim

What is claimed is:

1 . A system-on-chip comprising:
a nonvolatile memory configured to load a first image received from external storage and a first signature verification algorithm; at least one processor configured to control the nonvolatile memory such that first verifications are performed on the first image; a volatile memory, wherein the first image is loaded to the volatile memory by the at least one processor; and a one-time programmable (OTP) memory configured to program a hash value of a second signature verification algorithm different from the first signature verification algorithm, wherein, in initialization, based on version information about the second signature verification algorithm being further programmed in the OTP memory, the at least one processor is further configured to:
load a second image received from the external storage to the volatile memory, the second image being different from the first image;
perform a second verification on the second image based on the programmed hash value;
based on the second verification succeeding, execute the second signature verification algorithm corresponding to the version information; and
perform the first verifications by applying the second signature verification algorithm to the first image.

2 . The system-on-chip of claim 1 , wherein, based on the version information not being programmed, the at least one processor is further configured to:
load the first image to the volatile memory; and perform the first verifications by applying the first signature verification algorithm to the first image.

3 . The system-on-chip of claim 2 , wherein the first image comprises a bootloader code, a first secure code, a firmware code, a second secure code, a first signature, and a second signature,
wherein the first verifications comprise a bootloader verification and a firmware verification, and wherein the at least one processor is further configured to:
perform the bootloader verification by applying the first signature verification algorithm to the first signature for the bootloader code and the first secure code; and
perform the firmware verification by applying the first signature verification algorithm to the second signature for the firmware code and the second secure code.

4 . The system-on-chip of claim 3 , wherein the first image further comprises the programmed hash value of the second signature verification algorithm and the version information, and
wherein the at least one processor is further configured to:
based on the bootloader verification and the firmware verification succeeding, program the programmed hash value and the version information in the OTP memory.

5 . The system-on-chip of claim 3 , wherein the bootloader verification is performed based on hash values calculated by applying a hash algorithm to each of the bootloader code and the first secure code.

6 . The system-on-chip of claim 3 , wherein the firmware verification is performed based on hash values calculated by applying a hash algorithm to each of the firmware code and the second secure code.

7 . The system-on-chip of claim 1 , wherein the second image comprises an algorithm code for a signature verification corresponding to the version information.

8 . The system-on-chip of claim 7 , wherein the at least one processor is further configured to:
calculate a hash value of the algorithm code; and perform the second verification by comparing the hash value of the algorithm code and the programmed hash value.

9 . The system-on-chip of claim 1 , wherein the version information comprises a plurality of versions associated with the second signature verification algorithm, and
wherein the system-on-chip further comprises a plurality of pointers storing data on addresses of the volatile memory, at which the plurality of versions are respectively loaded.

10 . The system-on-chip of claim 9 , wherein, based on a first version among the plurality of versions being programmed, the at least one processor is further configured to:
load the second image including a first algorithm code for a first signature verification corresponding to the first version to the volatile memory; perform the second verification based on a first hash value programmed with regard to the second image; and based on the second verification succeeding, execute the first algorithm code indicated by a first pointer corresponding to the first version from among the plurality of pointers, and wherein the first hash value is generated based on the first algorithm code corresponding to the first version.

11 . The system-on-chip of claim 10 , wherein, based on a second version among the plurality of versions being programmed after the first version is programmed, the at least one processor is further configured to:
load a second algorithm code for a second signature verification corresponding to the second version to the volatile memory such that the second verification is performed; and based on the second verification succeeding, not execute the first algorithm code and execute the second algorithm code indicated by a second pointer corresponding to the second version from among the plurality of pointers.

12 . The system-on-chip of claim 1 , wherein the first image comprises a bootloader code, a first signature, a second signature, a first secure code, a firmware code, and a second secure code,
wherein the first verifications comprise a bootloader verification and a firmware verification, and wherein the at least one processor is further configured to:
perform the bootloader verification by applying the second signature verification algorithm to the first signature for the bootloader code and the first secure code; and
perform the firmware verification by applying the second signature verification algorithm to the second signature for the firmware code and the second secure code.

13 . The system-on-chip of claim 1 , wherein the first signature verification algorithm comprises at least one of a Rivest Shamir Adleman (RSA) algorithm, an Elliptic Curve Digital Signature Algorithm (ECDSA), and an Edwards-curve Digital Signature Algorithm (EdDSA), and
wherein the second signature verification algorithm comprises a Post-Quantum Cryptography (PQC) algorithm.

14 . An operating method of a system-on-chip which comprises a nonvolatile memory storing a first signature verification algorithm, a volatile memory, and a one-time programmable (OTP) memory, and at least one processor configured to control the nonvolatile memory, the volatile memory, and the OTP memory, the operating method comprising:
reading, by the at least one processor, the OTP memory; based on version information about a second signature verification algorithm different from the first signature verification algorithm being programmed in the OTP memory, loading, by the at least one processor, a first image received from external storage to the volatile memory; performing, by the at least one processor, a first verification on the first image based on a programmed hash value of the second signature verification algorithm programmed in the OTP memory; based on the first verification succeeding, executing, by the at least one processor, the second signature verification algorithm corresponding to the version information; loading, by the at least one processor, a second image received from the external storage to the volatile memory, the second image being different from the first image; and performing, at by the at least one processor, second verifications by applying the second signature verification algorithm to the

Assignees

• Samsung Electronics Co Ltd

Inventors

• Park Keunyoung
• Park Dongjin

Classifications

• H04L9/3247 Primary

  involving digital signatures · CPC title

• G06F2212/1052

  Security improvement · CPC title

• G06F21/76

  in application-specific integrated circuits [ASIC] or field-programmable devices, e.g. field-programmable gate arrays [FPGA] or programmable logic devices [PLD] · CPC title

• H04L9/3228

  One-time or temporary data, i.e. information which is sent for every authentication or authorization, e.g. one-time-password, one-time-token or one-time-key · CPC title

• G06F21/575

  Secure boot · CPC title