Light receiving element and distance measuring device

Patent metadata

Field	Value
Publication number	US-12474479-B2
Application number	US-202017755980-A
Country	US
Kind code	B2
Filing date	Oct 8, 2020
Priority date	Nov 21, 2019
Publication date	Nov 18, 2025
Grant date	Nov 18, 2025

Abstract

Provided is a light receiving element capable of lowering the on-voltage of a transfer transistor and suppressing transfer failures at a low on-voltage. The light receiving element includes a plurality of pixels arranged in a matrix, each of the plurality of pixels including: a photoelectric conversion unit; first and second charge storage units that store charges generated by the photoelectric conversion unit; first and second transfer transistors that transfer the charges from the photoelectric conversion unit to the first and second charge storage units, respectively; first and second amplification transistors that amplify potentials of the first and second charge storage units, respectively; and a connection wiring that electrically connects the first charge storage unit and the first amplification transistor, wherein a first transfer control wiring electrically connected to a gate of the first transfer transistor of each of the pixels in the same row extends in a row direction in a first wiring layer, and the connection wiring extends to the first wiring layer.

First claim

The invention claimed is:

1 . A light receiving element, comprising:
a plurality of pixels arranged in a matrix, each of the plurality of pixels including: a photoelectric conversion unit; first and second charge storage units that store charges generated by the photoelectric conversion unit; first and second transfer transistors that transfer the charges from the photoelectric conversion unit to the first and second charge storage units, respectively; first and second amplification transistors that amplify potentials of the first and second charge storage units, respectively; and a connection wiring that electrically connects the first charge storage unit and the first amplification transistor, wherein a first transfer control wiring electrically connected to a gate of the first transfer transistor of each of the plurality of pixels in the same row extends in a row direction in a first wiring layer, and the connection wiring extends to the first wiring layer.

2 . The light receiving element according to claim 1 , wherein
the connection wiring is adjacent to the first transfer control wiring in the first wiring layer.

3 . The light receiving element according to claim 1 , wherein
the connection wiring extends in parallel with the first transfer control wiring in the first wiring layer.

4 . The light receiving element according to claim 1 , wherein
each of the plurality of pixels further includes a discharge transistor for discharging the charges of the photoelectric conversion unit, and a discharge control wiring electrically connected to a gate of the discharge transistor of each of the plurality of pixels in the same row extends in the row direction in the first wiring layer.

5 . The light receiving element according to claim 4 , wherein
an intermediate potential is applied to the gate of the discharge transistor while the charges are being stored in the first and second charge storage units.

6 . The light receiving element according to claim 1 , wherein
each of the plurality of pixels further includes a reset transistor for resetting the charges of the first charge storage unit, and a reset control wiring connected to a gate of the reset transistor of each of the plurality of pixels in the same row extends in the row direction in the first wiring layer.

7 . The light receiving element according to claim 6 , wherein an intermediate potential is applied to the gate of the reset transistor while the charges are being stored in the first and second charge storage units.

8 . The light receiving element according to claim 1 , wherein the first transfer control wiring surrounds the connection wiring in the first wiring layer.

9 . The light receiving element according to claim 1 , wherein
the first transfer control wiring extends to a second wiring layer which is an upper layer of the first wiring layer, and the first transfer control wiring in the second wiring layer overlaps the connection wiring in the first wiring layer.

10 . The light receiving element according to claim 9 , wherein the connection wiring in the first wiring layer extends in parallel with the first transfer control wiring in the second wiring layer.

11 . The light receiving element according to claim 9 , wherein the connection wiring in the first wiring layer extends in parallel in a direction orthogonal to the first transfer control wiring in the second wiring layer.

12 . The light receiving element according to claim 1 , wherein
the connection wiring includes: an upper-layer wiring arranged in the first wiring layer; and a lower-layer wiring arranged in the second wiring layer, which is a lower layer of the first wiring layer, and the lower-layer wiring is connected to the upper-layer wiring by an upper-layer via, and is connected to each of the first charge storage unit and the gate of the first amplification transistor by a lower-layer via.

13 . The light receiving element according to claim 1 , wherein
the first transfer control wiring is connected to the gate of the first transfer transistor of a portion of the plurality of pixels in the same row, a second transfer control wiring to which a potential having the same phase as that of the first transfer control wiring is applied is connected to the gate of the first transfer transistor of another portion of the plurality of pixels in the same row, the first and second transfer control wirings extend in the row direction in the first wiring layer, and the connection wiring is sandwiched between the first and second transfer control wirings in the first wiring layer.

14 . A light receiving element, comprising:
a plurality of pixels arranged in a matrix, each of the plurality of pixels including: a photoelectric conversion unit; first and second charge storage units that store charges generated by the photoelectric conversion unit; first and second transfer transistors that transfer the charges from the photoelectric conversion unit to the first and second charge storage units, respectively; first and second amplification transistors that amplify potentials of the first and second charge storage units, respectively; a connection wiring that electrically connects the first charge storage unit and the first amplification transistor; and a discharge transistor that discharges the charges of the photoelectric conversion unit, wherein a discharge control wiring electrically connected to a gate of the discharge transistor of each of the plurality of pixels in the same row extends in a row direction in a first wiring layer, and the connection wiring extends to the first wiring layer.

15 . A light receiving element, comprising:
a plurality of pixels arranged in a matrix, each of the plurality of pixels including: a photoelectric conversion unit; first and second charge storage units that store charges generated by the photoelectric conversion unit; first and second transfer transistors that transfer the charges from the photoelectric conversion unit to the first and second charge storage units, respectively; first and second amplification transistors that amplify potentials of the first and second charge storage units, respectively; a connection wiring that electrically connects the first charge storage unit and the first amplification transistor; and a reset transistor that resets the charges of the first charge storage unit, wherein a reset control wiring connected to a gate of the reset transistor of each of the plurality of pixels in the same row extends in a row direction in a first wiring layer, and the connection wiring extends to the first wiring layer.

16 . A light receiving element, comprising:
a plurality of pixels arranged in a matrix, each of the plurality of pixels including: a photoelectric conversion unit; first and second charge storage units that store charges generated by the photoelectric conversion unit; first and second transfer transistors that transfer the charges from the photoelectric conversion unit to the first and second charge storage units, respectively; first and second amplification transistors that amplify potentials of the first and second charge storage units, respectively; a connection wiring that electrically connects the first charge storage unit and the first amplification transistor; and a reset transistor that resets the charges in the first charge storage unit, wherein a boost wiring for boosting the first charge storage unit while the charges are being stored in the first and second charge storage units extends in a row direction

Assignees

• Sony Semiconductor Solutions Corp

Inventors

• Maruyama Takuya
• Otake Yusuke

Classifications

• H10F39/811

  Interconnections · CPC title

• G01S17/89

  for mapping or imaging · CPC title

• G01S17/08

  for measuring distance only (indirect measurement G01S17/46; active triangulation systems G01S17/48) · CPC title

• G01S7/4863

  Detector arrays, e.g. charge-transfer gates · CPC title

• H10F39/12

  Image sensors · CPC title