Semiconductor package

Patent metadata

Field	Value
Publication number	US-12469815-B2
Application number	US-202318168795-A
Country	US
Kind code	B2
Filing date	Feb 14, 2023
Priority date	Aug 10, 2022
Publication date	Nov 11, 2025
Grant date	Nov 11, 2025

Abstract

According to one embodiment, a semiconductor package includes a first conductive member, a second conductive member, a plurality of semiconductor devices, a wiring member, a first connection member, and a second connection member. The plurality of semiconductor devices is provided between the first conductive member and the second conductive member. One of the semiconductor devices includes a semiconductor member, a first electrode, a first control electrode, a second control electrode, and a second electrode. The first and second conductive members are electrically connected to the first and second electrodes, respectively. The wiring member includes first, second and third wiring layers, and an insulating region. A part of the insulating region is located between the first wiring layer and the third wiring layer, and between the third wiring layer and the second wiring layer. The second wiring layer includes a first connection region and a second connection region.

First claim

What is claimed is:

1 . A semiconductor package, comprising:
a first conductive member; a second conductive member; a plurality of semiconductor devices provided between the first conductive member and the second conductive member, one of the plurality of semiconductor devices including a semiconductor member, a first electrode provided between the first conductive member and the semiconductor member, a first control electrode provided between the first conductive member and the semiconductor member, a second control electrode provided between the first conductive member and the semiconductor member, and a second electrode provided between the semiconductor member and the second conductive member, the first conductive member being electrically connected to the first electrode, the second conductive member being electrically connected to the second electrode, a direction from the second control electrode to the first control electrode crossing a first direction from the first conductive member to the second conductive member; a wiring member including a first wiring layer, a second wiring layer, a third wiring layer, and an insulating region, a direction from the first wiring layer to the second wiring layer and a direction from the first wiring layer to the third wiring layer being along the first direction, at least a part of the insulating region being located between the first wiring layer and the third wiring layer, and between the third wiring layer and the second wiring layer, a position of the second wiring layer in the first direction being between a position of the insulating region in the first direction and a position of the plurality of semiconductor devices in the first direction, the second wiring layer including a first connection region and a second connection region, the first connection region being electrically connected to the first wiring layer, the third wiring layer being electrically connected to the first conductive member; a first connection member provided between the first connection region and the first control electrode, the first connection member electrically connecting the first connection region to the first control electrode; and a second connection member provided between the second connection region and the second control electrode, the second connection member electrically connecting the second connection region to the second control electrode.

2 . The package according to claim 1 , wherein
the position of the second wiring layer in the first direction is between a position of the first wiring layer in the first direction and the position of the plurality of semiconductor devices in the first direction, and a position of the third wiring layer in the first direction is between the position of the first wiring layer in the first direction and the position of the second wiring layer in the first direction.

3 . The package according to claim 2 , wherein a distance between the first wiring layer and the third wiring layer along the first direction is not less than 0.3 times and not more than 3.0 times of a distance between the third wiring layer and the second wiring layer along the first direction.

4 . The package according to claim 2 , wherein
the wiring member further includes a first connecting portion; the first connecting portion electrically connects the first wiring layer to the first connection region, and at least a part of the first connecting portion extends in the first direction in the insulating region.

5 . The package according to claim 4 , wherein
the third wiring layer includes a third wiring layer hole, and the first connecting portion passes through the third wiring layer hole.

6 . The package according to claim 1 , wherein
the position of the second wiring layer in the first direction is between a position of the third wiring layer in the first direction and the position of the plurality of semiconductor devices in the first direction, and a position of the first wiring layer in the first direction is between the position of the third wiring layer in the first direction and the position of the second wiring layer in the first direction.

7 . The package according to claim 6 , wherein a capacitance of the second control electrode is larger than a capacitance of the first control electrode.

8 . The package according to claim 1 , wherein
the first conductive member includes a first base portion and a first protruding portion connected to the first base portion, the wiring member includes a wiring member hole, and the first protruding portion passes through the wiring member hole.

9 . The package according to claim 8 , further comprising:
a first conductive plate; and a second conductive plate, the first conductive plate being located between the first protruding portion and the first electrode, and the second conductive plate being between the second electrode and the second conductive member.

10 . The package according to claim 8 , further comprising
an insulating plate, the insulating plate being provided between the first base portion and the wiring member.

11 . The package according to claim 1 , wherein
the wiring member further includes a second connecting portion and a fourth wiring layer, the first wiring layer further includes a third connection region, the insulating region is located between the fourth wiring layer and the third connection region in the first direction, the second connecting portion extends in the insulating region along the first direction, and the second connecting portion electrically connects the fourth wiring layer to the third connection region.

12 . The package according to claim 11 , further comprising
a fixing member, the fixing member including a first fixing portion and a first fixing extension portion, the first fixing extension portion being connected with the first fixing portion, the fourth wiring layer, the second connecting portion, and the third connection region being located between a part of the first conductive member and the first fixing portion in the first direction, the first fixing extension portion passing through the fourth wiring layer, the second connecting portion, and the third connection region in the first direction, and the first fixing extension portion being fixed to the part of the first conductive member.

13 . The package according to claim 12 , wherein the fixing member is a screw.

14 . The package according to claim 1 , wherein the first connection member and the second connection member are elastic members.

15 . The package according to claim 1 , wherein
the one of the plurality of semiconductor devices is an IGBT,
the first electrode functions as an emitter electrode,
the second electrode functions as a collector electrode, and
a current flowing between the first electrode and the second electrode is configured to be controlled by a potential of at least one of the first control electrode or the second control electrode.

16 . The package according to claim 1 , further comprising
an insulating member, the insulating member being provided around the plurality of semiconductor devices in a plane crossing the first direction, and at least a part of the insulating member being located between the first conductive member and the second conductive member.

17 . The package according to claim 16 , further comprising:
a first terminal electrically connected to the first wiring layer; a second terminal electrically connected to the second wiring layer; and a thir

Assignees

• Toshiba Kk
• Toshiba Electronic Devices & Storage Corp

Inventors

• Yoshida Satoshi
• Sakano Tatsunori
• Gejo Ryohei

Classifications

• H10W90/736

  between a chip and a stacked lead frame, conducting package substrate or heat sink · CPC title

• H10W72/352

  comprising metals or metalloids, e.g. solders · CPC title

• H10W70/60

  Insulating or insulated package substrates; Interposers; Redistribution layers (leadframes H10W70/40) · CPC title

• H10W70/20

  Conductive package substrates serving as an interconnection, e.g. metal plates (leadframes H10W70/40) · CPC title

• H10W20/42

  Vias, e.g. via plugs · CPC title