Display panel and display device

Patent metadata

Field	Value
Publication number	US-12469442-B2
Application number	US-202318577394-A
Country	US
Kind code	B2
Filing date	Jan 28, 2023
Priority date	Nov 10, 2022
Publication date	Nov 11, 2025
Grant date	Nov 11, 2025

Abstract

Provided are a display panel and a display device. The display panel includes a first display area and a second display area. Light transmittance in the first display area is larger than light transmittance in the second display area. The first display area includes multiple first light-emitting elements. The second display area includes multiple second light-emitting elements. The multiple first light-emitting elements and the multiple second light-emitting elements have the same distribution density. The second display area includes multiple first pixel circuits and multiple second pixel circuits. The multiple first pixel circuits are in a one-to-one correspondence electrically connected to the multiple first light-emitting elements. The multiple second pixel circuits are in a one-to-one correspondence electrically connected to the multiple second light-emitting elements.

First claim

What is claimed is:

1 . A display panel, comprising:
a first display area and a second display area, wherein light transmittance in the first display area is larger than light transmittance in the second display area; the first display area comprises a plurality of first light-emitting elements, the second display area comprises a plurality of second light-emitting elements, and the plurality of first light-emitting elements and the plurality of second light-emitting elements have a same distribution density; and the second display area comprises a plurality of first pixel circuits and a plurality of second pixel circuits; the plurality of first pixel circuits are in a one-to-one correspondence electrically connected to the plurality of first light-emitting elements; and the plurality of second pixel circuits are in a one-to-one correspondence electrically connected to the plurality of second light-emitting elements; wherein the second display area comprises a first display sub-area and a second display sub-area, wherein the first display sub-area is adjacent to the first display area and the second display sub-area is adjacent to the first display sub-area; and at least one second pixel circuit of the plurality of second pixel circuits corresponding to at least one second light-emitting element of the plurality of second light-emitting elements in the first display sub-area is located in the second display sub-area.

2 . The display panel of claim 1 , wherein the first display sub-area comprises a first sub-region and a second sub-region, wherein the first sub-region and the first display area are adjacent in a first direction, the second sub-region and the first display area are adjacent in a second direction, and the first direction intersects the second direction; and
the plurality of first pixel circuits are located in at least one of the first sub-region or the second sub-region.

3 . The display panel of claim 2 , wherein a maximum width of the first display area in the first direction is equal to a maximum width of the second sub-region in the first direction; and
a maximum width of the first display area in the second direction is equal to a maximum width of the first sub-region in the second direction.

4 . The display panel of claim 2 , wherein the plurality of first pixel circuits are located in a first area; and
at least one second pixel circuit of the plurality of second pixel circuits, corresponding to at least one second light-emitting element in a second area of the plurality of second light-emitting elements, is located in the second display sub-area, wherein the first area is the first sub-region, the second area is the second sub-region, or the first area is the second sub-region and the second area is the first sub-region.

5 . The display panel of claim 4 , wherein the first area comprises at least one first circuit group and at least one second circuit group, the at least one first circuit group comprises at least one first pixel circuit, the at least one second circuit group comprises at least one second pixel circuit of the plurality of second pixel circuits, and a first circuit group of the at least one first circuit group is located on one side of a second circuit group of the at least one second circuit group, wherein the one side of the second circuit group is adjacent to the first display area; and
the second display sub-area comprises at least one third circuit group and at least one fourth circuit group, wherein the at least one third circuit group comprises at least one second pixel circuit corresponding to at least one second light-emitting element in the second area, the at least one fourth circuit group comprises second pixel circuits in the second display sub-area other than the at least one second pixel circuit in the at least one third circuit group, and a third circuit group of the at least one third circuit group is located on one side of a fourth circuit group of the at least one fourth circuit group, wherein the one side of the fourth circuit group is adjacent to the second area.

6 . The display panel of claim 5 , wherein a size of a first pixel circuit of the plurality of first pixel circuits is equal to a size of a second pixel circuit in the at least one third circuit group;
a size of a first pixel circuit of the plurality of first pixel circuits is equal to a size of at least one second pixel circuit of the plurality of second pixel circuits in the at least one second circuit group; and a size of a second pixel circuit in the at least one third circuit group is equal to a size of at least one second pixel circuit of the second circuits in the at least one fourth circuit group, wherein the size of the first pixel circuit comprises a first side length in the first direction of an area where the first pixel circuit is located and a second side length in the second direction of the area where the first pixel circuit is located; the size of the second pixel circuit comprises a third side length in the first direction of an area where the second pixel circuit is located and a fourth side length in the second direction of the area where the second pixel circuit is located; and wherein the first side length corresponding to the first pixel circuit is equal to the third side length corresponding to the second pixel circuit, and the second side length corresponding to the first pixel circuit is equal to the fourth side length corresponding to the second pixel circuit.

7 . The display panel of claim 6 , wherein a second circuit group of the at least one second circuit group comprises a first circuit sub-group and a second circuit sub-group, a size of a second pixel circuit in the first circuit sub-group and a size of a second pixel circuit in the second circuit sub-group are not equal, and the first circuit sub-group is located on one side of the second circuit sub-group adjacent to a first circuit group of the at least one first circuit group; and a size of a second pixel circuit in the at least one first circuit group is equal to the size of the first pixel circuit; and
a fourth circuit group of the at least one fourth circuit group comprises a third circuit sub-group and a fourth circuit sub-group, a size of a second pixel circuit in the third circuit sub-group and a size of a second pixel circuit in the fourth circuit sub-group are not equal, and the third circuit sub-group is located on one side of the fourth circuit sub-group adjacent to a third group of the at least one third circuit group; and a size of a second pixel circuit in the third circuit sub-group is equal to a size of a second pixel circuit in the third circuit group.

8 . The display panel of claim 6 , wherein a size of each first pixel circuit of the plurality of first pixel circuits and a size of each second pixel circuit of the plurality of second pixel circuits are equal; and
the display panel further comprises a plurality of first virtual pixel circuits located in the first area and the second display sub-area, and an orthographic projection the plurality of first virtual pixel circuits on a plane where the display panel is located does not overlap an orthographic projection of the plurality of first pixel circuits on the plane where the display panel is located and does not overlap an orthographic projection of the plurality of second pixel circuits on the plane where the display panel is located.

9 . The display panel of claim 8 , wherein the plurality of first virtual pixel circuits are located on one side of the at least one second circuit group facing away from the at least one first circuit group and are located on one side of the at least one fourth circuit group facing away from the at least one third

Assignees

• Wuhan Tianma Micro Electronics Co Ltd

Inventors

• Ma Yangzhao
• Dai Hao

Classifications

• G09G2360/14

  Detecting light within display terminals, e.g. using a single or a plurality of photosensors · CPC title

• G09G2300/0842

  forming a memory circuit, e.g. a dynamic memory with one capacitor · CPC title

• G09G2300/0426

  Layout of electrodes and connections · CPC title

• G06V40/1318

  using electro-optical elements or layers, e.g. electroluminescent sensing · CPC title

• H10K59/122

  Pixel-defining structures or layers, e.g. banks · CPC title