Unified stateless compression system for universally consumable compression

Patent metadata

Field	Value
Publication number	US-12469099-B2
Application number	US-202117561666-A
Country	US
Kind code	B2
Filing date	Dec 23, 2021
Priority date	Dec 23, 2021
Publication date	Nov 11, 2025
Grant date	Nov 11, 2025

Abstract

A system includes a compression engine that stores the compression format information embedded in the compressed data. The compression format information can be included in a header that includes compression control surface (CCS) information. The system includes a shared memory to store compressed data for multiple hardware pipelines, where blocks of the compressed data have a common memory footprint and the compression header. The compression engine can compress data to store in the shared memory including generation of the header. The compression engine can decompress data read from the shared memory, including identification of the compression format from the header.

First claim

What is claimed is:

1 . A graphics processor, comprising:
a memory controller to couple to a shared memory to store compressed data for multiple graphics components, wherein blocks of the compressed data have a common memory footprint where a starting location of the blocks in the shared memory is based on a full block size regardless of compression ratio, and wherein the blocks include a header with compression format information and compression control surface (CCS) information; and a compression engine to compress data to store in the shared memory and decompress data read from the shared memory, wherein to compress the data to store includes generation of the header and wherein to decompress the data read includes identification of the compression format from the header, wherein the compression engine is to compress the data prior to transmission of the data to the shared memory, where transmission includes a fixed-size packet with a variable amount of data based on compression levels of the data.

2 . The graphics processor of claim 1 , wherein the compression format information comprises a value for a lookup table to indicate a compression type.

3 . The graphics processor of claim 1 , wherein the compression engine comprises a compressor/decompressor core and a control plane cache to store CCS information.

4 . The graphics processor of claim 3 , wherein the compression engine is to receive data to be compressed from one of the multiple graphics components, including an indicator that the received data is to be compressed in a stateless format, and in response to the indicator, the compression engine is to generate the header with the compression format information.

5 . The graphics processor of claim 1 , wherein the blocks of the compressed data have a unified memory layout.

6 . The graphics processor of claim 5 , wherein the unified memory layout comprises a row major format layout.

7 . The graphics processor of claim 1 , further comprising:
a communication fabric between the graphics components, wherein the communication fabric is to support multiple data transfer sizes based on block compression ratio.

8 . The graphics processor of claim 7 , wherein the communication fabric supports transfer of compressed data and transfer of uncompressed data.

9 . The graphics processor of claim 1 , wherein the compression engine comprises a first compression engine, and further comprising:
a second compression engine, wherein the first compression engine and the second compression engine are at different layers of the graphics processor.

10 . A computer system comprising:
a central processing unit (CPU) to execute general computations; a graphics unit coupled to the CPU, the graphics unit including:
a memory controller to couple to a shared memory to store compressed data for multiple graphics components, wherein blocks of the compressed data have a common memory footprint where a starting location of the blocks in the shared memory is based on a full block size regardless of compression ratio, and wherein the blocks include a header with compression format information and compression control surface (CCS) information; and
a compression engine to compress data to store in the shared memory and decompress data read from the shared memory, wherein to compress the data to store includes generation of the header and wherein to decompress the data read includes identification of the compression format from the header, wherein the compression engine is to compress the data prior to transmission of the data to the shared memory, where transmission includes a fixed-size packet with a variable amount of data based on compression levels of the data.

11 . The computer system of claim 10 , wherein the compression format information comprises a value for a lookup table to indicate a compression type.

12 . The computer system of claim 10 , wherein the compression engine is to receive data to be compressed from one of the multiple graphics components, including an indicator that the received data is to be compressed in a stateless format, and in response to the indicator, the compression engine is to generate the header with the compression format information and the CCS information.

13 . The computer system of claim 10 , wherein the blocks of the compressed data have a unified memory layout, wherein the unified memory layout comprises a row major format layout.

14 . The computer system of claim 10 , further comprising:
a communication fabric between the multiple graphics components, wherein the communication fabric is to support multiple data transfer sizes based on block compression ratio.

15 . The computer system of claim 14 , wherein the communication fabric supports transfer of compressed data and transfer of uncompressed data.

16 . The computer system of claim 10 , wherein the multiple graphics components comprise one or more of:
a media pipeline; a color pipeline; a display pipeline; a video capture pipeline; or an artificial intelligence (AI) accelerator pipeline.

17 . The computer system of claim 10 , wherein the compression engine comprises a first compression engine, and further comprising:
a second compression engine, wherein the first compression engine and the second compression engine are at different layers of the graphics unit.

18 . The computer system of claim 10 , further comprising:
main system memory separate from the shared memory of the graphics unit; wherein the compression engine is to provide compression and decompression of data in the main system memory for access by the CPU.

19 . A method for compression, comprising:
storing compressed data in a shared memory for multiple graphics components as blocks of compressed data have a common memory footprint where a starting location of the blocks in the shared memory is based on a full block size regardless of compression ratio, and the blocks include a header with compression format information and compression control surface (CCS) information; compressing data to store in the shared memory, including generating the header; and decompressing data read from the shared memory, including identifying the compression format from the header; wherein compressing the data comprises compressing the data prior to transmission of the data to the shared memory, where transmission includes a fixed-size packet with a variable amount of data based on compression levels of the data.

20 . The method of claim 19 , further comprising:
transmitting blocks of compressed data between the graphics components with a communication fabric that supports multiple data transfer sizes based on block compression ratio.

21 . The method of claim 20 , wherein the communication fabric supports transfer of compressed data and transfer of uncompressed data.

Assignees

• Intel Corp

Inventors

• Szerszen Karol A
• Surti Prasoonkumar
• Krishnan Vidhya
• Navale Aditya
• Appu Abhishek R
• Koker Altug
• Silvas Ronald W

Classifications

• G06F12/084

  with a shared cache · CPC title

• G06T1/20

  Processor architectures; Processor configuration, e.g. pipelining · CPC title

• G06F2212/401

  Compressed data · CPC title

• G06T1/60 Primary

  Memory management · CPC title

• H04N19/426

  using memory downsizing methods · CPC title