Display with shallow contact holes and reduced metal residue at planarization layer steps
US-10101853-B2 · Oct 16, 2018 · US
US12464931B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-12464931-B2 |
| Application number | US-202217897783-A |
| Country | US |
| Kind code | B2 |
| Filing date | Aug 29, 2022 |
| Priority date | Nov 8, 2021 |
| Publication date | Nov 4, 2025 |
| Grant date | Nov 4, 2025 |
A practical reading order for non-experts. Skip the full description unless you need deep technical detail.
What the patent document calls the invention.
A short plain-language summary of the technical disclosure.
Who owns or filed the patent and who is credited as inventor.
Filing, priority, publication, and grant dates set the timeline.
The legal scope of protection — read this for what is actually claimed.
Technology tags used to group this patent with similar filings.
Prior art links and similar publications in this corpus.
Official abstract text for this publication.
A display device includes a blocking pattern between a display area and a dam structure and having an undercut shape. The blocking pattern includes an etched metal layer, and a first upper metal layer which is on the etched metal layer and has a width greater than a width of the etched metal layer.
Opening claim text (preview).
What is claimed is: 1 . A display device comprising: a substrate comprising: a display area including a transistor; and a non-display area adjacent to the display area along a plane of the substrate; and the non-display area including: a dam structure protruded from the substrate in a thickness direction of the substrate which crosses the plane of the substrate; and a blocking pattern which is protruded from the substrate in the thickness direction, is between the transistor and the dam structure along the plane of the substrate, and has an undercut shape, wherein the blocking pattern having the undercut shape comprises: an etched metal layer spaced apart from the dam structure along the plane of the substrate and having a width along the plane of the substrate; and a first upper metal layer on the etched metal layer, spaced apart from the dam structure along the plane of the substrate and having a width along the plane of the substrate which is greater than the width of the etched metal layer. 2 . The display device of claim 1 , wherein the transistor includes: an active pattern; and a connecting electrode on the active pattern and contacting the active pattern, and the blocking pattern in the non-display area is in a same layer as the connecting electrode in the display area. 3 . The display device of claim 1 , wherein the etched metal layer and the first upper metal layer include a metal. 4 . The display device of claim 3 , wherein the etched metal layer includes copper. 5 . The display device of claim 3 , wherein the first upper metal layer includes polycrystalline indium-tin-oxide. 6 . The display device of claim 1 , wherein the dam structure includes: a lower dam structure including a first organic material; and an upper dam structure further from the substrate than the lower dam structure and including a second organic material. 7 . The display device of claim 6 , further comprising: a first organic structure on the first upper metal layer, and in a same layer as the first organic material of the lower dam structure; and a second organic structure on the first organic structure, and in a same layer as the second organic material of the upper dam structure. 8 . The display device of claim 1 , further comprising: a lower blocking pattern between the blocking pattern and the substrate, and the lower blocking pattern including: a first lower metal layer having a width; and a lower etched metal layer on the first lower metal layer, and having a width smaller than the width of the first upper metal layer. 9 . The display device of claim 8 , wherein the transistor includes: an active pattern; a gate electrode on the active pattern; and a connecting electrode on the gate electrode and contacting the active pattern, the lower blocking pattern is in a same layer as the gate electrode, and the blocking pattern is in a same layer as the connecting electrode. 10 . The display device of claim 8 , wherein the etched metal layer of the blocking pattern and the lower etched metal layer of the lower metal pattern each includes copper. 11 . The display device of claim 1 , wherein the blocking pattern further includes a second upper metal layer between the first upper metal layer and the etched metal layer. 12 . The display device of claim 11 , wherein the second upper metal layer includes titanium. 13 . The display device of claim 1 , wherein within the non-display area, the blocking pattern is provided in plural including: a first blocking pattern; and a second blocking pattern between the first blocking pattern and the dam structure. 14 . A display device comprising: a substrate comprising: a display area including a transistor; and a non-display area adjacent to the display area in a plane of the substrate; and the non-display area including: a dam structure protruded from the substrate in a thickness direction of the substrate which crosses the plane of the substrate; and a blocking pattern which is protruded from the substrate in the thickness direction, is between the transistor and the dam structure along the plane of the substrate, and having an undercut shape, wherein the blocking pattern having the undercut shape comprises: an etched metal layer spaced apart from the dam structure along the plane of the substrate and having a width along the plane of the substrate; and an upper insulating layer on the etched metal layer, spaced apart from the dam structure along the plane of the substrate and having a width along the plane of the substrate which is greater than the width of the etched metal layer. 15 . The display device of claim 14 , wherein the transistor includes: an active pattern; a gate electrode on the active pattern; and an interlayer insulating layer on the gate electrode, and covering the gate electrode, the etched metal layer is in a same layer as the gate electrode, and the upper insulating layer is in a same layer as the interlayer insulating layer. 16 . A display device comprising: a substrate comprising: a display area including a transistor; and a non-display area adjacent to the display area along a plane of the substrate; and the non-display area including: a dam structure protruded from the substrate in a thickness direction of the substrate which crosses the plane of the substrate; and a blocking pattern which is protruded from the substrate in the thickness direction, is outside the dam structure along the plane of the substrate, and has an undercut shape, and wherein the blocking pattern having the undercut shape comprises: an etched metal layer spaced apart from the dam structure along the plane of the substrate and having a width; and a first upper metal layer on the etched metal layer, spaced apart from the dam structure along the plane of the substrate and having a width along the plane of the substrate which is greater than the width of the etched metal layer. 17 . The display device of claim 16 , wherein the transistor includes: an active pattern; and a connecting electrode on the active pattern and contacting the active pattern, and the blocking pattern in the non-display area is in a same layer as the connecting electrode in the display area. 18 . The display device of claim 16 , wherein the etched metal layer and the first upper metal layer include a metal. 19 . The display device of claim 18 , wherein the etched metal layer includes copper. 20 . The display device of claim 18 , wherein the first upper metal layer includes polycrystalline indium-tin-oxide.
Encapsulations · CPC title
comprising light absorbing layers, e.g. light-blocking layers · CPC title
comprising light absorbing layers, e.g. black layers · CPC title
comprising indium oxides, e.g. ITO · CPC title
comprising tin oxides, e.g. fluorine-doped SnO2 · CPC title
Related publications grouped by family.
Answers are generated from the same data shown on this page.