Motor bus switching

Patent metadata

Field	Value
Publication number	US-12463572-B2
Application number	US-202318486692-A
Country	US
Kind code	B2
Filing date	Oct 13, 2023
Priority date	Oct 14, 2022
Publication date	Nov 4, 2025
Grant date	Nov 4, 2025

Abstract

A motor system includes a motor, first and second power rails connected to a DC voltage input terminal, and a DC bus capacitor connected between the first and second power rails. An inverter circuit has a first inverter leg, a second inverter leg and a third inverter leg, each of which includes first and second power switches connected in series between the first and second power rails. The inverter circuit is configured to selectively output energization signals to phase windings of the motor. A DC link discharge circuit is configured to monitor a voltage level of the DC bus capacitor, and a bus switching circuit is configured to selectively output one of a first DC voltage level or a second DC voltage level to the DC voltage input terminal in response to an output of the DC link discharge circuit.

First claim

What is claimed is:

1 . A motor system, comprising:
a motor; first and second power rails connected to a DC voltage input terminal; a DC bus capacitor connected between the first and second power rails; an inverter circuit including a first inverter leg, a second inverter leg and a third inverter leg, each of the first, second and third inverter legs including first and second power switches connected in series between the first and second power rails, the inverter circuit configured to selectively output energization signals to phase windings of the motor; a DC link discharge circuit configured to monitor a voltage level of the DC bus capacitor; and a bus switching circuit configured to selectively output one of a first DC voltage level or a second DC voltage level to the DC voltage input terminal in response to an output of the DC link discharge circuit.

2 . The system of claim 1 , wherein the first DC voltage level is a high DC voltage level and wherein the second DC voltage level is a low DC voltage level that is lower than the high DC voltage level.

3 . The system of claim 1 , wherein the bus switching circuit is configured to selectively output the one of the first DC voltage level or the second DC voltage level in response to the DC link discharge circuit determining that the voltage level of the DC bus capacitor has discharged to a first predetermined level.

4 . The system of claim 3 , wherein the bus switching circuit is configured to selectively output the one of the first DC voltage level or the second DC voltage level in response to the DC link discharge circuit determining that the voltage level of the DC bus capacitor has discharged to a level between the first predetermined level and a second predetermined level.

5 . The system of claim 4 , wherein the second predetermined level is a low DC voltage level.

6 . The system of claim 4 , wherein the first predetermined level is a high DC voltage level.

7 . The system of claim 4 , wherein the first predetermined level is configured for an aircraft high lift mode.

8 . The system of claim 4 , wherein the second predetermined level is configured for an aircraft variable camber mode.

9 . The system of claim 1 , wherein the DC link discharge circuit includes:
a first comparator circuit configured to compare the voltage level of the DC bus capacitor to a third DC voltage level lower than the first DC voltage level and higher than the second DC voltage level; and a second comparator circuit configured to compare the voltage level of the DC bus capacitor to the second DC voltage level.

10 . The system of claim 9 , wherein the DC link discharge circuit includes:
a dissipation circuit configured to selectively connect the DC bus capacitor to a discharge path in response to the first and second comparator circuits.

11 . A method, comprising:
providing a motor; providing an inverter circuit configured to selectively energize phase windings of the motor, the inverter circuit including a first inverter leg, a second inverter leg and a third inverter leg, each of the first, second and third inverter legs including first and second power switches connected in series between first and second power rails; providing a first DC voltage input to the inverter circuit at a first DC voltage level; determining a voltage level of a DC bus capacitor connected between the first and second power rails; and in response to the determined voltage level of the DC bus capacitor reaching a predetermined voltage level, providing a second DC voltage input to the inverter circuit at a second DC voltage level lower than the first DC voltage level.

12 . The method of claim 11 , wherein the first DC voltage is input to the inverter circuit for an aircraft high lift mode.

13 . The method of claim 11 , wherein the second DC voltage is input to the inverter circuit for an aircraft variable camber mode.

14 . The method of claim 11 , further comprising:
comparing the voltage level of the DC bus capacitor to a third DC voltage level lower than the first DC voltage level and higher than the second DC voltage level; comparing the voltage level of the DC bus capacitor to the second DC voltage level; and providing the second DC voltage input to the inverter circuit in response to the voltage level of the DC bus capacitor being between the third DC voltage level and the second DC voltage level.

15 . The method of claim 14 , further comprising:
selectively connecting the DC bus capacitor to a discharge path in response to the to the voltage level of the DC bus capacitor being less than the third DC voltage level.

16 . A motor control system, comprising:
an inverter circuit including a first inverter leg, a second inverter leg and a third inverter leg, each of the first, second and third inverter legs including first and second power switches connected in series between first and second power rails, the inverter circuit configured to selectively output energization signals to phase windings of a motor; a DC link discharge circuit configured to monitor a voltage level of a DC bus capacitor connected between the first and second power rails; and a bus switching circuit configured to selectively output one of a first DC voltage level or a second DC voltage level to the inverter circuit in response to an output of the DC link discharge circuit.

17 . The system of claim 16 , wherein the first DC voltage level is a high DC voltage level and wherein the second DC voltage level is a low DC voltage level that is lower than the high DC voltage level.

18 . The system of claim 16 , wherein the bus switching circuit is configured to selectively output the one of the first DC voltage level or the second DC voltage level in response to the DC link discharge circuit determining that the voltage level of the DC bus capacitor has discharged to a first predetermined level.

19 . The system of claim 18 , wherein the bus switching circuit is configured to selectively output the one of the first DC voltage level or the second DC voltage level in response to the DC link discharge circuit determining that the voltage level of the DC bus capacitor has discharged to a level between the first predetermined level and a second predetermined level.

20 . The system of claim 19 , wherein the second predetermined level is a low DC voltage level.

Assignees

• Eaton Intelligent Power Ltd

Inventors

• Potdar Girish
• Bhatt Darshan Harish

Classifications

• H02P27/08

  with pulse width modulation · CPC title

• H02M1/10

  Arrangements incorporating converting means for enabling loads to be operated at will from different kinds of power supplies, e.g. from AC or DC · CPC title

• H02M7/5387

  in a bridge configuration · CPC title

• H02P23/10 Primary

  Controlling by adding a DC current · CPC title

• H02M1/322 Primary

  Means for rapidly discharging a capacitor of the converter for protecting electrical components or for preventing electrical shock · CPC title