Inverter systems featuring hybrid TCM/CCM modulation scheme

US12463557B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-12463557-B2
Application numberUS-202318481743-A
CountryUS
Kind codeB2
Filing dateOct 5, 2023
Priority dateOct 5, 2023
Publication dateNov 4, 2025
Grant dateNov 4, 2025

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  1. Title

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  2. Abstract

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  5. First independent claim

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

To reduce switching losses, an inverter circuitry of this disclosure may operate using triangular current mode (TCM) control for the semiconductor devices to achieve zero voltage switching (ZVS) at the turn-on of the semiconductor switches. In contrast to other techniques, such as operating the inverter circuitry in continuous conduction mode (CCM), switching devices experience hard switching (usually associated to body-diode hard commutation) at turn-on, and therefore experience the associated switching losses. The inverter circuitry of this disclosure is controlled by processing circuitry, which is configured to apply a smart frequency modulation scheme that enables TCM operation.

First claim

Opening claim text (preview).

What is claimed is: 1 . An inverter circuit comprising input terminals, output terminals, and at least four semiconductor switches, the inverter circuit configured to: receive direct current (DC) input power at the input terminals and output alternating current (AC) power at the output terminals; and receive control signals from a controller, the controller comprising processing circuitry, wherein the control signals modulate a switching frequency for the inverter circuit based at least on an instantaneous AC output current and instantaneous AC output voltage at the output terminals, wherein the switching frequency is further based on a predetermined first AC output current, wherein for at least one operating mode the predetermined first AC output current is such that each switch is configured to turn ON with zero voltage switching (ZVS). 2 . The circuit of claim 1 , wherein the switching frequency varies throughout an AC switching cycle for the inverter circuit, wherein the switching frequency is further based on a second AC output current during an AC switching cycle, wherein the second AC output current is an electric current value at which each switch turns OFF, and wherein the second AC output current has a greater magnitude than the first AC output current. 3 . The circuit of claim 1 , wherein the output terminals comprise a first output terminal and a second output terminal, and wherein the controller is configured to determine a time to turn ON a first switch of the at least four switches (T on ), wherein the controller is configured to determine T on according to: T o ⁢ n = L ⁢ ❘ "\[LeftBracketingBar]" I 2 - I 1 ❘ "\[RightBracketingBar]" V N - ❘ "\[LeftBracketingBar]" V A ⁢ C ❘ "\[RightBracketingBar]" wherein: L represents a sum of a first inductance connected to the first output terminal and a second inductance connected to the second output terminal, I 1 represents an instantaneous magnitude of the first AC output current, I 2 represents an instantaneous magnitude of a second AC output current, V IN represents a voltage magnitude of the DC input power, and V AC represents an instantaneous voltage magnitude of a DC output power. 4 . The circuit of claim 3 , wherein the inverter circuit comprises switches arranged in a highly efficient and reliable inverter concept (HERIC) topology, and wherein the controller is configured to determine a time (T off ) to turn OFF a first switch of the at least four switches, wherein the controller is configured to determine T off according to: T off = L ⁢ ❘ "\[LeftBracketingBar]" I 2 - I 1 ❘ "\[RightBracketingBar]" ❘ "\[LeftBracketingBar]" V A ⁢ C ❘ "\[RightBracketingBar]" . 5 . The circuit of claim 4 , wherein an instantaneous switching frequency (f SW ) is defined according to: f SW = 1 T o ⁢ n + T off . 6 . The circuit of claim 1 , wherein during an AC-cycle of the output AC power, the controller is configured to modulate the switching frequency to enable conduction of an electrical current excursion of the output AC power between the first AC output current and a second AC output current. 7 . The circuit of claim 6 , wherein the controller is configured to apply a triangular carrier signal to modulate changes in the switching frequency. 8 . The circuit of claim 1 , wherein the controller is configured to modulate the switching frequency and without regard to zero crossing detection (ZCD) measurements. 9 . A system comprising: processing circuitry configured to output switching control signals; and an inverter circuit comprising input terminals, output terminals, and at least four switches, the inverter circuit configured to: receive direct current (DC) input power at the input terminals and output alternating current (AC) power at the output terminals; and receive control signals from the processing circuitry, wherein the control signals modulate a switching frequency for the inverter circuit based at least on an instantaneous AC output current and instantaneous AC output voltage at the output terminals, wherein the switching frequency is further based on a predetermined first AC output current, wherein for at least one operating mode the predetermined first AC output current is such that each switch is configured to turn ON with zero voltage switching (ZVS). 10 . The system of claim 9 , whe

Assignees

Inventors

Classifications

  • Converters switched with a phase shift, i.e. interleaved (non-isolated DC/DC converters H02M3/1586) · CPC title

  • by pulse-width modulation · CPC title

  • using digital control · CPC title

  • Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes · CPC title

  • in a bridge configuration · CPC title

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What does patent US12463557B2 cover?
To reduce switching losses, an inverter circuitry of this disclosure may operate using triangular current mode (TCM) control for the semiconductor devices to achieve zero voltage switching (ZVS) at the turn-on of the semiconductor switches. In contrast to other techniques, such as operating the inverter circuitry in continuous conduction mode (CCM), switching devices experience hard switching (…
Who is the assignee on this patent?
Infineon Technologies Austria Ag
What technology area does this patent fall under?
Primary CPC classification H02M7/53873. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Nov 04 2025 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).