Thin film structure and electronic device including the same

US12457792B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-12457792-B2
Application numberUS-202418635385-A
CountryUS
Kind codeB2
Filing dateApr 15, 2024
Priority dateSep 30, 2019
Publication dateOct 28, 2025
Grant dateOct 28, 2025

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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Abstract

Official abstract text for this publication.

Disclosed herein is a thin film structure, including a first conductive layer on a dielectric layer including a plurality of layers. Each of the plurality of layers includes a dopant layer containing a dopant A and a HfO2 layer to form a compound of HfxA1-xOz (0<x<1, z is a real number). An uppermost layer of the plurality of layers is thickest among the plurality of layers. The first conductive layer contacts the uppermost layer.

First claim

Opening claim text (preview).

What is claimed is: 1. A thin film structure, comprising: a dielectric layer including a plurality of layers to form a compound of Hf x Zr 1-x O z , the plurality of layers including a first layer, a second layer on the first layer, and an uppermost layer over the second layer, and a first conductive layer on the dielectric layer, the first conductive layer directly contacting the uppermost layer of the plurality of layers in the dielectric layer, wherein in the compound of Hf x Zr 1-x O z , 0<x<1, z is a real number, the uppermost layer includes HfO 2 , none of the plurality of layers in the dielectric layer are thicker than the uppermost layer of the dielectric layer, the first layer includes HfO 2 and has a thickness of i*t (i is an integer, and t is a real number), the second layer includes ZrO 2 and has a thickness of j*t (j is an integer and j>i), and the uppermost layer has a thickness of k*t (k is and integer and k>i, j). 2. The thin film structure of claim 1 , wherein t is 0.05 nm or more. 3. The thin film structure of claim 1 , wherein pairs of the first layer and the second layer are repeatedly disposed under the uppermost layer. 4. The thin film structure of claim 3 , wherein repeated number of the pairs of the first layer and second layer is R, and k≤R*(j−i). 5. The thin film structure of claim 1 , wherein the dielectric layer has a thickness of about 0.5 nm to about 20 nm. 6. The thin film structure of claim 1 , wherein the first conductive layer includes any one of a metal, a conductive oxide, and graphene. 7. The thin film structure of claim 6 , wherein the first conductive layer includes the metal. 8. The thin film structure of claim 6 , wherein the first conductive layer includes the conductive oxide. 9. The thin film structure of claim 6 , wherein the first conductive layer includes the graphene. 10. An electronic device, comprising: a semiconductor layer; and the thin film structure of claim 1 , on the semiconductor layer. 11. The electronic device of claim 10 , further comprising: an insulating layer between the semiconductor layer and the thin film structure. 12. The electronic device of claim 11 , further comprising: a second conductive layer between the insulating layer and the thin film structure. 13. An electronic device, comprising: a second conductive layer; and the thin film structure of claim 1 , on the second conductive layer. 14. The electronic device of claim 13 , further comprising: an insulating layer between the second conductive layer and the thin film structure.

Assignees

Inventors

Classifications

  • the material containing two or more metal elements · CPC title

  • the material containing hafnium, e.g. HfO2 · CPC title

  • to change the morphology of the insulating materials, e.g. transformation of an amorphous layer into a crystalline layer · CPC title

  • Laminate layers, e.g. stacks of alternating high-k metal oxides (adhesion layers or buffer layers H10P14/6508, H10P14/6548) · CPC title

  • Thermal treatments, e.g. annealing or sintering · CPC title

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What does patent US12457792B2 cover?
Disclosed herein is a thin film structure, including a first conductive layer on a dielectric layer including a plurality of layers. Each of the plurality of layers includes a dopant layer containing a dopant A and a HfO2 layer to form a compound of HfxA1-xOz (0<x<1, z is a real number). An uppermost layer of the plurality of layers is thickest among the plurality of layers. The first conductiv…
Who is the assignee on this patent?
Samsung Electronics Co Ltd
What technology area does this patent fall under?
Primary CPC classification H10D64/689. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Oct 28 2025 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 5 related publications on this page (citations in our corpus or others sharing the same primary CPC).