Universal ethernet solution

Patent metadata

Field	Value
Publication number	US-12455845-B2
Application number	US-202418616617-A
Country	US
Kind code	B2
Filing date	Mar 26, 2024
Priority date	Jun 19, 2013
Publication date	Oct 28, 2025
Grant date	Oct 28, 2025

Abstract

A monolithic integrated circuit that supports multiple industrial Ethernet protocols, fieldbus protocols, and industrial application processing, thereby providing a single hardware platform that may be used to build various automation devices/equipment implemented in an industrial network, such as controllers, field devices, network communication nodes, etc. The monolithic integrated circuit may comprise at least one application processor core operable to execute an industrial application and Ethernet connectivity/management code, including standard Ethernet connectivity/management code and industrial Ethernet connectivity/management code; a real time processing module configured to support a plurality of industrial Ethernet data link layers; an interface configured to be coupled to an external non volatile memory from which the at least one application processor is configured for execute in place processing; and on-chip RAM having a capacity sufficient to eliminate the need for external RAM in execution by the at least one application processor core of an operating system, the industrial application, and the Ethernet connectivity/management code.

First claim

What is claimed is:

1 . A monolithic integrated circuit, comprising:
at least one application processor core operable to execute an industrial application and Ethernet connectivity/management code, including standard Ethernet connectivity/management code and industrial Ethernet connectivity/management code; a real-time processing module configured to support a plurality of industrial Ethernet data link layers; an interface configured to be coupled to an external non-volatile memory from which the at least one application processor core is configured for execute-in-place processing; and on-chip RAM having a capacity sufficient to eliminate the need for external RAM in execution by the at least one application processor core of an operating system, the industrial application, and the Ethernet connectivity/management code; and a soft real-time Ethernet switch, hard real-time Ethernet interfaces, and at least one low-speed fieldbus/comms interface, wherein the on-chip RAM has a capacity of at least 2 MB, the capacity being sufficient as main execution memory for execution by the at least one application processor core of the operating system, the industrial application, and the Ethernet connectivity/management code, wherein the at least one application processor core is configured to execute-in-place from the external non-volatile memory at least one of the operating system, the industrial application, and the Ethernet connectivity/management code, and wherein the monolithic integrated circuit is configured such that during execution the on-chip RAM (i) stores at least changeable process data associated with execution of the operating system, the industrial application, and the Ethernet connectivity/management code, and (ii) does not store code associated with each of the operating system, the industrial application, and the Ethernet connectivity/management code that is subject to execution-in-place, and (i) wherein for each of the operating system, industrial application, and Ethernet connectivity/management code that is configured to be executed in place from the external non-volatile memory, the on-chip RAM stores neither an associated initialized data segment nor associated Ethernet connectivity/management code, or (ii) wherein for at least one of the operating system, industrial application, and Ethernet connectivity/management code that is configured to be executed-in-place from the external non-volatile memory, the on-chip RAM stores the associated initialized data segment and does not store the associated code.

2 . The monolithic integrated circuit according to claim 1 , further comprising a master/slave external bus interface configured to provide for direct master/slave communications with another microprocessor.

3 . The monolithic integrated circuit according to claim 1 , further comprising at least one port multiplexor configured for multiplexing said soft real-time Ethernet switch and hard real-time Ethernet interfaces to at least one port of the monolithic integrated circuit.

4 . The monolithic integrated circuit according to claim 1 , wherein the soft real-time Ethernet switch, the hard real-time Ethernet interfaces, and the at least one low-speed fieldbus/comms interface each include corresponding physical layer (PHY) circuitry for each of respective protocols needed for the Ethernet and the at least one fieldbus/comms.

5 . The monolithic integrated circuit according to claim 1 , wherein the monolithic integrated circuit does not include on-chip Flash memory.

6 . The monolithic integrated circuit according to claim 5 , wherein the monolithic integrated circuit does not include any on-chip non-volatile memory used for storing any one or more of (i) the industrial application, (ii) the Ethernet connectivity/management code, and (iii) the operating system.

7 . The monolithic integrated circuit according to claim 1 , wherein during execution at least one of the following code is stored in and executed from the on-chip RAM: (i) performance and latency critical code, such as the real-time processor code; (ii) self-modifying code; and (iii) code whose execution purpose is not compatible with execute-in-place (XIP), including any erase/write routines for the external non-volatile memory.

8 . The monolithic integrated circuit according to claim 1 , wherein the on-chip RAM has a capacity of about 2 MB to about 128 MB, or
wherein the on-chip RAM has a capacity of about 2 MB to about 6 MB, or wherein the on-chip RAM has a capacity of about 6 MB to about 15 MB, or wherein the on-chip RAM has a capacity of about 15 MB to about 25 MB, or wherein the on-chip RAM has a capacity of about 50 MB to about 128 MB.

Assignees

• Schneider Electric Ind Sas

Inventors

• Jaraudias Patrice
• Adragna Jean-Jacques
• Chauvet Antonio
• Ware Gary R

Classifications

• G06F13/4022

  using switching circuits, e.g. switching matrix, connection or expansion network (G06F13/4009 takes precedence) · CPC title

• G06F13/362

  with centralised access control · CPC title

• H04L49/351

  for local area network [LAN], e.g. Ethernet switches · CPC title

• H04L69/12

  Protocol engines · CPC title

• H04L69/18

  Multiprotocol handlers, e.g. single devices capable of handling multiple protocols · CPC title