Reduction of capacitance and forcing of different voltages for capacitor

Patent metadata

Field	Value
Publication number	US-12455651-B2
Application number	US-202318232827-A
Country	US
Kind code	B2
Filing date	Aug 11, 2023
Priority date	Feb 13, 2021
Publication date	Oct 28, 2025
Grant date	Oct 28, 2025

Abstract

The present invention involves driving multiple capacitors, including a shielding capacitance (Cin_sd), to minimize voltage fluctuations detected on the CDA signal line ( 200 ), thereby enhancing the resolution of the ADC. The additional capacitance (Cobj) generated between the CDA ( 100 ) and the object ( 20 ) due to the appearance of the object ( 20 ) is detected in the form of voltage. By analyzing with an ADC of improved resolution, it is possible to detect the presence of the object ( 20 ) more reliably.

First claim

What is claimed is:

1. A capacitive detection device, comprising:
capacitive detection areas (CDAs) consisting of a conductor and an independent area, installed in a display device;
signal lines connected to the capacitive detection areas; and
a shielding capacitor, an interline capacitor, and a common electrode capacitor connected in parallel to a sensing signal line of the signal lines;
wherein a driving voltage is applied to the shielding capacitor and the interline capacitor excluding the common electrode capacitor among the shielding capacitor, the interline capacitor, and the common electrode capacitor, and an additional capacitance added to the capacitive detection area is detected,
wherein the shielding capacitor indicates a capacitance formed between a shielding area formed on a layer different from a layer in a semiconductor IC with patterned a sensing signal line and the sensing signal line, the interline capacitor indicates a capacitance formed between the sensing signal line and signal lines adjacent to the sensing signal line, and the common electrode capacitor indicates a capacitance formed between a common electrode layer of the display device and the sensing signal line,
wherein the driving voltage applied to a capacitor consists of a first stage driving voltage and a second stage driving voltage, the first stage driving voltage precedes the second stage driving voltage, and a size of the first stage driving voltage and a size of the second stage driving voltage are different, and
wherein the shielding capacitor is applied with a first driving voltage, and the interline capacitor is applied with a second driving voltage, wherein the first driving voltage and the second driving voltage are of different.

2. The capacitive detection device according to claim 1 , wherein:
the first driving voltage and the second driving voltage are generated and supplied from different power supplies.

3. The capacitive detection device according to claim 1 , wherein:
the shielding capacitor between the shielding area and the sensing signal line, and the shielding area is formed on a different layer from the patterned layer when the sensing signal line is connected to a signal detector inside the semiconductor IC.

4. The capacitive detection device according to claim 1 , wherein:
as a length of the sensing signal line increases, a distance between the sensing signal line and the signal lines adjacent to the sensing signal line increases.

5. The capacitive detection device according to claim 1 , wherein:
a width of the sensing signal line increases as a length of the sensing signal line increases.

6. The capacitive detection device according to claim 1 , wherein:
when the first driving voltage and the second driving voltage are applied, each size of a first stage driving voltage is a voltage that is either low or high together.

7. The capacitive detection device according to claim 6 , wherein:
timing of an application of the second stage driving voltage of the first driving voltage and timing of the application of the second stage driving voltage of the second driving voltage are different.

8. The capacitive detection device according to claim 1 , wherein:
different driving voltages are applied at each cycle time based on a length of the signal line connected to the capacitive detection area.

9. The capacitive detection device according to claim 3 , wherein:
when there is no additional capacitance added to the capacitive detection areas at end of the sensing signal lines, a first sensing signal detected from the sensing signal lines is derived from an equation 1, and when there is an additional capacitance, a second sensing signal detected from the sensing signal lines is derived from an equation 2, and an operational amplifier outputs voltage difference from the equation 1 and the equation 2,

first
⁢

sensing
⁢

signal

=

Vrst
+

(

V
⁢
d
⁢
2

-

V
⁢
d
⁢
1

)

*
C
⁢
d

+

(

V
⁢
c
⁢
i
⁢
n
⁢
2

-

V
⁢
c
⁢
i
⁢
n
⁢
1

)

*
Cin_sd

C
⁢
d

+
Cin_sd
+

C
⁢
c
⁢
m

[

Equation
⁢

1

]

second
⁢

sensing
⁢

signal

Assignees

• Lee Sung Ho

Inventors

• Lee Sung Ho

Classifications

• G06F2203/04107

  Shielding in digitiser, i.e. guard or shielding arrangements, mostly for capacitive touchscreens, e.g. driven shields, driven grounds · CPC title

• G06F3/044 Primary

  by capacitive means · CPC title

• G06F3/0418

  for error correction or compensation, e.g. based on parallax, calibration or alignment · CPC title

• G06F3/04164

  Connections between sensors and controllers, e.g. routing lines between electrodes and connection pads · CPC title

• G06F3/0443

  using a single layer of sensing electrodes · CPC title