Display apparatus and method of providing display apparatus

Patent metadata

Field	Value
Publication number	US-12453263-B2
Application number	US-202217835415-A
Country	US
Kind code	B2
Filing date	Jun 8, 2022
Priority date	Oct 21, 2021
Publication date	Oct 21, 2025
Grant date	Oct 21, 2025

Abstract

A display apparatus includes a substrate, a semiconductor layer on the substrate, the semiconductor layer including an oxide semiconductor, a channel region and a first region which extends from the channel region to a first edge of the semiconductor layer and has a lower resistance than that of the channel region, a first inorganic insulating layer covering the semiconductor layer and including a first contact hole which overlaps the first region, a first electrode on the first inorganic insulating layer, overlapping the first region and electrically connected to the first region through the first contact hole, a gate electrode on the first inorganic insulating layer and overlapping the channel region, a second inorganic insulating layer covering the first electrode and the gate electrode, and a display element on the second inorganic insulating layer.

First claim

What is claimed is:

1. A display apparatus comprising:
a substrate;
a transistor on the substrate, including:
a semiconductor layer including an oxide semiconductor, a channel region and a first region which extends from the channel region to define a first edge of the semiconductor layer;
within the semiconductor layer, an electrical resistance of the first region lower than an electrical resistance of the channel region;
a first inorganic insulating layer covering the semiconductor layer and defining a first contact hole which overlaps the first region;
a first electrode on the first inorganic insulating layer and electrically connected to the first region of the semiconductor at the first contact hole in the first inorganic insulating layer; and
a gate electrode on the first inorganic insulating layer and overlapping the channel region;

a second inorganic insulating layer covering the first electrode and the gate electrode of the transistor;
a capacitor electrically connected to the transistor, the capacitor comprising a first capacitor electrode, a second capacitor electrode and a third capacitor electrode which overlap each other, wherein
the second capacitor electrode comprises a same material as the first region of the semiconductor layer,
the first capacitor electrode is below the second capacitor electrode, and
the third capacitor electrode is above the second capacitor electrode and is electrically connected to the first capacitor electrode, and

a display element which is on the second inorganic insulating layer and connected to the transistor.

2. The apparatus of claim 1 , wherein the first electrode of the transistor overlaps an entirety of the first contact hole of the first inorganic insulating layer.

3. The apparatus of claim 1 , wherein the first electrode and the gate electrode of the transistor are both between the first inorganic insulating layer and the second inorganic insulating layer and include a same material as each other.

4. The apparatus of claim 1 , wherein
the transistor further includes a second electrode between the first inorganic insulating layer and the second inorganic insulating layer,
the semiconductor layer further includes a second region extending from the channel region to define a second edge of the semiconductor layer which is opposite to the first edge,
within the semiconductor layer, an electrical resistance of the second region is lower than the electrical resistance of the channel region, and overlapping the second electrode,
the first inorganic insulating layer further defines a second contact hole which overlaps the second region of the semiconductor layer,
the second electrode of the transistor is electrically connected to the second region of the semiconductor at the second contact hole in the first inorganic insulating layer,
the second inorganic insulating layer includes a lower hole exposing the first electrode or the second electrode to outside the second inorganic insulating layer, and
at the lower hole, the first electrode or the second electrode of the transistor is electrically connected to the display element.

5. The apparatus of claim 4 , wherein the first inorganic insulating layer continuously extends from the first contact hole to the second contact hole and overlaps each of the first region, the channel region and the second region of the semiconductor layer.

6. The apparatus of claim 1 , further comprising:
a buffer layer between the substrate and the semiconductor layer and defining a hole of the buffer layer; and
a wiring between the substrate and the buffer layer,
wherein
the first inorganic insulating layer further defines a hole corresponding to the hole of the buffer layer, and
the wiring is electrically connected to the first electrode of the transistor at the hole of the buffer layer and the hole of the first inorganic insulating layer.

7. The apparatus of claim 6 , wherein
the first capacitor electrode is between the substrate and the buffer layer;
the second capacitor electrode is between the buffer layer and the first inorganic insulating layer; and
an electrical resistance of the second capacitor electrode is lower than the electrical resistance of the channel region of the transistor.

8. The apparatus of claim 7 , wherein the third capacitor electrode is between the first inorganic insulating layer and the second inorganic insulating layer.

9. The apparatus of claim 7 , wherein
the capacitor further includes a fourth capacitor electrode on the second inorganic insulating layer and overlapping the second capacitor electrode,
the display element includes a pixel electrode, an emission layer and an opposite electrode, and
the pixel electrode of the display element and the fourth capacitor electrode of the capacitor are respective patterns of a same material layer on the substrate.

10. The apparatus of claim 1 , wherein the display element emits light,
further comprising a color panel which is on the display element and changes a wavelength of the light which is emitted from the display element.

11. A method for providing an electronic apparatus, the method comprising:
providing a semiconductor layer of a transistor, on a substrate, the semiconductor layer including an oxide semiconductor, a channel region having an electrical resistance, and a first region having an electrical resistance which is lower than the electrical resistance of the channel region;
after the providing of the first region of the semiconductor layer having the electrical resistance which is lower than the electrical resistance of the channel region:
providing a first inorganic insulating layer covering the first region and the channel region of the semiconductor layer; and
providing a first contact hole in the first inorganic insulating layer which overlaps the first region of the transistor;

providing an electrode layer of the transistor, the electrode layer including a first electrode which overlaps the first region and is electrically connected to the first region at the first contact hole, and a gate electrode which overlaps the channel region; and
providing a second inorganic insulating layer covering the first electrode and the gate electrode of the transistor.

12. The method of claim 11 , wherein the providing of the semiconductor layer includes:
providing a first layer including the oxide semiconductor;
providing a photoresist on the first layer, the photoresist including:
a first photoresist region which corresponds to the first region of the semiconductor layer and has a first thickness, and
a channel photoresist region which corresponds to the channel region of the semiconductor layer and has a second thickness greater than the first thickness;

providing etching of the first layer having the photoresist thereon, to provide portions of the first layer as the first region and the channel region of the semiconductor layer, respectively; and
providing stripping of the photoresist from the first layer which is etched.

13. The method of claim 12 , wherein
the providing of the photoresist includes etching the photoresist to expose the first region of the semiconductor layer to outside the photoresist, and
the providing of the semiconductor layer includes doping of the first region which is exposed to outside the photoresist.

14. The method of claim 13 , wherein the providing of the etching of the first layer defines the first region of the semiconductor layer which extends from the channel region and defines a first edge of the semiconductor layer.

15. The method of claim 11 , further compris

Assignees

• Samsung Display Co Ltd

Inventors

• Choi Jongbum
• Kim Seulki
• Yoon Kapsoo
• Lee Woogeun
• Lee Jaehyun
• Choi Seungha

Classifications

• G09G2300/0842

  forming a memory circuit, e.g. a dynamic memory with one capacitor · CPC title

• G09G2300/0426

  Layout of electrodes and connections · CPC title

• G09G3/3233

  with pixel circuitry controlling the current through the light-emitting element · CPC title

• H10K71/00

  Manufacture or treatment specially adapted for the organic devices covered by this subclass · CPC title

• H10K59/1201

  Manufacture or treatment · CPC title