Display panel and display apparatus
US-2020212135-A1 · Jul 2, 2020 · US
US12453256B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-12453256-B2 |
| Application number | US-202017759708-A |
| Country | US |
| Kind code | B2 |
| Filing date | Mar 18, 2020 |
| Priority date | Mar 18, 2020 |
| Publication date | Oct 21, 2025 |
| Grant date | Oct 21, 2025 |
A practical reading order for non-experts. Skip the full description unless you need deep technical detail.
What the patent document calls the invention.
A short plain-language summary of the technical disclosure.
Who owns or filed the patent and who is credited as inventor.
Filing, priority, publication, and grant dates set the timeline.
The legal scope of protection — read this for what is actually claimed.
Technology tags used to group this patent with similar filings.
Prior art links and similar publications in this corpus.
Official abstract text for this publication.
Disclosed are a display panel and a display device. In the display panel, at least one first data connection portion is respectively electrically connected to at least one data line and at least one first data transmission line through a first data via hole; at least one row of first-type sub-pixels corresponds to at least one first data connection portion; for a first scanning line and the first data connection portion corresponding to the same row of sub-pixels, and the first data line and the first data transmission line electrically connected through the first data connection portion, the orthographic projections of the first data connection portion and the first scanning line have an overlapping area, and the orthographic projections of the first data line and the first data transmission line are not overlapped with the orthographic projection of the first scanning line.
Opening claim text (preview).
What is claimed is: 1. A display panel, comprising: a base substrate, comprising a notch region, a display region and a first non-display region, the first non-display region being located between the notch region and the display region; wherein the display region comprises a plurality of sub-pixels; a third conductive layer, located on the base substrate, and comprising a plurality of first scanning lines and a plurality of second scanning lines located in the display region; wherein one row of sub-pixels corresponds to one first scanning line and one second scanning line; a second insulating layer, located on a side of the third conductive layer facing away from the base substrate; a first conductive layer, located on a side of the second insulating layer facing away from the base substrate, and comprising a plurality of data lines and a plurality of first data transmission lines; an interlayer insulating layer, located on a side of the first conductive layer facing away from the base substrate, and having a plurality of first data via holes; and a second conductive layer, located on a side of the interlayer insulating layer facing away from the base substrate, and comprising a plurality of first data connection portions; wherein the plurality of data lines are located in the display region, and the plurality of first data transmission lines are located in the first non-display region; at least one of the plurality of first data connection portions is electrically connected with at least one of the plurality of data lines and at least one of the plurality of first data transmission lines through the plurality of first data via holes; rows of sub-pixels comprise rows of first-type sub-pixels; at least one row of sub-pixels in the rows of first-type sub-pixels corresponds to the at least one of the plurality of first data connection portions; and for a first scanning line and a first data connection portion corresponding to a same row of sub-pixels, and a first data line and a first data transmission line electrically connected through the plurality of first data connection portions, orthographic projections of the plurality of first data connection portions on the base substrate and orthographic projections of the plurality of first scanning lines on the base substrate have overlapping areas, and an orthographic projection of the first data line on the base substrate and orthographic projections of the plurality of first data transmission lines on the base substrate are not overlapped with the orthographic projections of the plurality of first scanning lines on the base substrate. 2. The display panel according to claim 1 , wherein the second conductive layer further comprises: a plurality of second data transmission lines disposed spaced from the plurality of first data connection portions; the plurality of second data transmission lines are located in the first non-display region; the interlayer insulating layer further comprises: a plurality of second data via holes; and the plurality of data lines comprise a plurality of first data lines and a plurality of second data lines; wherein one first data line is electrically connected with one first data transmission line through the plurality of first data connection portions, and one second data line is electrically connected with one second data transmission line through a second data via hole; wherein a second scanning line corresponding to a first row of sub-pixels in every two adjacent rows of sub-pixels is electrically connected to a first scanning line corresponding to a second row of sub-pixels in the every two adjacent rows of sub-pixels. 3. The display panel according to claim 2 , wherein the first conductive layer further comprises: a plurality of first scanning connection portions insulated from the data lines and the first data transmission lines and disposed at intervals; wherein the plurality of first scanning lines and the plurality of second scanning lines electrically connected with each other correspond to at least one of the plurality of first scanning connection portions; the second insulating layer comprises a plurality of first scanning via holes and a plurality of second scanning via holes; and a first end of a first scanning connection portion is electrically connected to a corresponding first scanning line through at least one of the plurality of first scanning via holes, and a second end of the first scanning connection portion is electrically connected to a corresponding second scanning line through at least one of the plurality of second scanning via holes; wherein the orthographic projections of the plurality of first data connection portions on the base substrate and orthographic projections of the plurality of first scanning connection portions on the base substrate are not overlapped. 4. The display panel according to claim 3 , wherein for a first scanning line, a second scanning line and a first data connection portion corresponding to a same row of sub-pixels, the orthographic projections of the plurality of first data connection portions on the base substrate are located between an orthographic projection of a first scanning via hole corresponding to the first scanning line on the base substrate and an orthographic projection of a second scanning via hole corresponding to the second scanning line on the base substrate; wherein for the first scanning line, the second scanning line and the first data connection portion corresponding to the same row of sub-pixels, a connection line between a center of the orthographic projection of the first scanning via hole corresponding to the first scanning line on the base substrate and a center of the orthographic projection of the second scanning via hole corresponding to the second scanning line on the base substrate is overlapped with the orthographic projection of the first data connection portion on the base substrate; wherein for the first scanning line and the first data connection portion corresponding to the same row of sub-pixels, an orthographic projection of a center region of the first data connection portion on the base substrate and the orthographic projection of the first scanning line on the base substrate have an overlapping area. 5. The display panel according to claim 3 , wherein a part of rows of sub-pixels in the rows of first-type sub-pixels correspond to two first data connection portions, and for a first scanning line, a second scanning line and the two first data connection portions corresponding to a same row of sub-pixels, orthographic projections of the two first data connection portions on the base substrate and an orthographic projection of the first scanning line on the base substrate have an overlapping area, and the orthographic projections of the two first data connection portions on the base substrate is not overlapped with an orthographic projection of the second scanning line on the base substrate. 6. The display panel according to claim 5 , wherein for the first scanning line, the second scanning line and the two first data connection portions corresponding to the same row of sub-pixels, an orthographic projection of a first one of the two first data connection portions on the base substrate is close to an orthographic projection of a first scanning via hole corresponding to the first scanning line on the base substrate; and/or, an orthographic projection of a second one of the two first data connection portions on the base substrate is close to an orthographic projection of a second scanning via hole corresponding to the second scanning line on the base substrate. 7. The display panel according to claim 3 , wherein the second conductive layer further comprises: a plurality of second data connection port
Interconnections, e.g. wiring lines or terminals (connection of the pixel electrodes to the driving transistors H10H29/39) · CPC title
OLEDs integrated with inorganic image sensors · CPC title
Interconnections, e.g. scanning lines · CPC title
wherein the TFTs are in active matrices · CPC title
characterised by materials, geometry or structure of the substrates · CPC title
Related publications grouped by family.
Answers are generated from the same data shown on this page.