Method and device for manufacturing sic substrate, and method for reducing macro-step bunching of sic substrate

Patent metadata

Field	Value
Publication number	US-12451348-B2
Application number	US-202017436309-A
Country	US
Kind code	B2
Filing date	Mar 3, 2020
Priority date	Mar 5, 2019
Publication date	Oct 21, 2025
Grant date	Oct 21, 2025

Abstract

A device for manufacturing a SiC substrate, in which formation of macro-step bunching is suppressed, comprises: a main body container that is capable of accommodating a SiC substrate and generates, by heating, a vapor pressure of gaseous species containing Si elements and gaseous species containing C elements, in an internal space; and a heating furnace that accommodates the main body container and performs heating so that a vapor pressure of the gaseous species containing Si elements is generated and a temperature gradient is formed, wherein the main body container has an etching space S 1 and a Si vapor supply source capable of supplying Si vapor into the main body container, the etching space S 1 being formed by making the SiC substrate face a portion of the main body container arranged on a lower-temperature side of the temperature gradient while the SiC substrate is disposed on a higher-temperature side of the temperature gradient.

First claim

The invention claimed is:

1. A method for manufacturing a SiC substrate comprising an etching process of etching a SiC substrate under a SiC—Si equilibrium vapor pressure environment by accommodating the SiC substrate inside a main container made of a material containing SiC that generates vapor pressure of a gaseous species containing Si element and a gaseous species containing C element in an internal space, and heating the main container so that a portion of the main container is arranged on a low temperature side of a temperature gradient and the SiC substrate is arranged on a high temperature side of the temperature gradient under an environment of vapor pressure of the gaseous species containing Si element.

2. The method for manufacturing a SiC substrate according to claim 1 , wherein a Si vapor supply source is arranged inside the main container.

3. The method for manufacturing a SiC substrate according to claim 1 , wherein the etching process includes
a Si atom sublimation process of thermally sublimating Si atoms from a surface of the SiC substrate, and
a C atom sublimation process of sublimating C atoms from the surface of the SiC substrate by reacting C atoms remaining on the surface of the SiC substrate with Si vapor in the main container.

4. The method for manufacturing a SiC substrate according to claim 1 , wherein, in the etching process, the SiC substrate arranged on a high temperature side of the temperature gradient and a portion of the main container arranged on a low temperature side of the temperature gradient are etched while facing each other.

5. A method for reducing macro-step bunching of a SiC substrate comprising an etching process of etching a SiC substrate in a main container made of a material containing SiC under a SiC—Si equilibrium vapor pressure environment,
wherein the etching process is a process in which a portion of the main container is arranged on a low temperature side of a temperature gradient and the SiC substrate is arranged on a high temperature side of the temperature gradient.

6. The method according to claim 5 , wherein the etching process is a process of performing heating in a temperature range of equal to or higher than 1400° C. and equal to or lower than 2300° C.

7. The method according to claim 5 , wherein the etching process is a process of performing etching by arranging a Si vapor supply source in a manner that an atomic number ratio Si/C in an etching space is higher than 1.

8. A method for manufacturing a SiC substrate comprising
an etching process of etching a SiC substrate by heating the SiC substrate in a main container made of a material containing SiC under a SiC—Si equilibrium vapor pressure environment, wherein
the etching process is a process of performing etching by arranging the SiC substrate in an etching space exhausted through an environment of vapor pressure of a gaseous species containing Si element and heating the SiC substrate so that the SiC substrate is arranged on a high temperature side of a temperature gradient.

9. The method for manufacturing a SiC substrate according to claim 8 , wherein the etching process is a process of performing etching by arranging a Si vapor supply source in a manner that an atomic number ratio Si/C in the etching space is higher than 1.

Assignees

• Kwansei Gakuin Educational Found
• Toyota Tsusho Corp

Inventors

• Kaneko Tadaaki
• Yoshida Natsuki
• Aoki Kazufumi

Classifications

• H10P14/3456

  Polycrystalline · CPC title

• H10P14/2904 Primary

  Silicon carbide · CPC title

• C30B33/12

  in gas atmosphere or plasma · CPC title

• C30B29/36 Primary

  Carbides · CPC title

• H01L21/02595

  Electricity · mapped topic