Display substrate and display apparatus

Patent metadata

Field	Value
Publication number	US-12451073-B2
Application number	US-202418921573-A
Country	US
Kind code	B2
Filing date	Oct 21, 2024
Priority date	Nov 27, 2020
Publication date	Oct 21, 2025
Grant date	Oct 21, 2025

Abstract

A display substrate and a display apparatus are provided, and the display substrate includes a pixel circuit with a light emitting module configured to emit light; a driving module configured to drive the light emitting module to emit light based on a driving voltage in a luminescence stage; a storage module configured to maintain and provide the driving voltage to the driving module in the luminescence stage; a first transistor, having a first electrode coupled to a position from which the driving module acquires the driving voltage; a second transistor, having a first electrode coupled to the first electrode of the first transistor, and a second electrode being not directly coupled to a signal source; and a voltage stabilizing capacitor, having a first electrode coupled to the second electrode of the second transistor, and a second electrode coupled to a constant voltage signal source.

First claim

What is claimed is:

1. A display substrate, comprising:
a base substrate; and
a plurality of sub-pixels on the base substrate, at least some of the sub-pixels comprising a pixel circuit,
wherein the pixel circuit comprises:
a light emitting module configured to emit light;
a driving module configured to drive the light emitting module to emit light based on a driving voltage in a luminescence stage;
a storage module configured to maintain and provide the driving voltage to the driving module in the luminescence stage;
a first transistor having a first electrode connected to a position from which the driving module acquires the driving voltage;
a second transistor having a first electrode connected to the first electrode of the first transistor, and a second electrode being not directly connected to a signal source; and
a voltage stabilizing capacitor having a first electrode connected to the second electrode of the second transistor, and a second electrode connected to a constant voltage signal source;
a third transistor having a first electrode connected to a second electrode of the first transistor, and a gate connected to a gate of the first transistor; and
a fourth transistor having a first electrode connected to the second electrode of the second transistor, and a gate connected to a gate of the second transistor;
wherein the light emitting module comprises a light emitting device;
the driving module comprises a driving transistor configured to drive the light emitting device to emit light based on a voltage at a gate of the driving transistor; and
the storage module comprises a storage capacitor having a first electrode connected to the gate of the driving transistor and configured to maintain the driving voltage at the first electrode of the storage capacitor and provide it to the driving module in the luminescence stage;
wherein the storage capacitor has a second electrode connected to a first power supply signal terminal which is provided with a first power supply signal via a structure forming a grid.

2. The display substrate of claim 1 , further comprising a semiconductor layer, a gate insulating layer, a first gate layer, a first interlayer insulating layer, a second gate layer, a second interlayer insulating layer and a first source-drain layer in a direction gradually far away from the base substrate;
wherein the second electrode of the storage capacitor is arranged in the second gate layer, and comprises a traverse connection structure extending in a traverse direction, at least some of transverse connection structures of adjacent pixel circuits in the traverse direction are connected to each other;
the first power supply signal terminal extends in a longitudinal direction, and the first power supply signal terminals of a plurality of columns are arranged in the first source-drain layer, and electrically coupled to the second electrodes of the storage capacitors in a same row, respectively, and the structure that provides the first power supply signal forms the grid; and
the traverse direction crosses over the longitudinal direction.

3. The display substrate of claim 1 , wherein the first electrode of the voltage stabilizing capacitor and the second electrode of the second transistor are arranged in a same layer and connected to each other as a single piece.

4. The display substrate of claim 1 , wherein the first electrode of the voltage stabilizing capacitor, the second electrode of the second transistor and the first electrode of the fourth transistor are formed as a single piece.

5. The display substrate of claim 3 , wherein
the first electrode of the voltage stabilizing capacitor and an active region of the driving transistor are arranged in a same layer, and the first electrode of the voltage stabilizing capacitor is made of a conductive semiconductor material; and
the second electrode of the second transistor and the active region of the driving transistor are arranged in a same layer, and the second electrode of the second transistor is made of a conductive semiconductor material.

6. The display substrate of claim 1 , wherein
the first electrode of the voltage stabilizing capacitor, the second electrode and an active region of the second transistor, and the first electrode and an active region of the fourth transistor are arranged in different layers, and
the first electrode of the voltage stabilizing capacitor, the second electrode of the second transistor, and the first electrode of the fourth transistor are connected to each other through at least one via hole in at least one insulating layer between the different layers.

7. The display substrate of claim 1 , wherein
the first electrode of the voltage stabilizing capacitor comprises a plurality of bending structures between the second electrode of the second transistor and the first electrode of the fourth transistor.

8. The display substrate of claim 1 , wherein
the first electrode of the voltage stabilizing capacitor comprises a structure connected to a node between the second electrode of the second transistor and the first electrode of the fourth transistor.

9. The display substrate of claim 2 , wherein the pixel circuit comprises a first reset module;
the first reset module is configured to reset a voltage at the gate of the driving transistor based on signals from an initialization signal terminal and a first reset signal terminal; and the first reset module comprises:
the first transistor;
the third transistor having the first electrode connected to the second electrode of the first transistor, a second electrode connected to the initialization signal terminal, and the gate connected to the gate of the first transistor and the first reset signal terminal;
wherein the driving transistor and the light emitting device are connected in series between the first power supply signal terminal and a second power supply signal terminal; and
a second electrode of the light emitting device is connected to the second power supply signal terminal.

10. The display substrate of claim 9 , wherein the second electrode of the voltage stabilizing capacitor and the initialization signal terminal are both arranged in the second gate layer.

11. The display substrate of claim 9 , wherein an orthographic projection of the first electrode of the voltage stabilizing capacitor on the base substrate partially overlaps with an orthographic projection of the second electrode of the voltage stabilizing capacitor on the base substrate; and
the first electrode of the voltage stabilizing capacitor is arranged in the semiconductor layer, and is separated from the second electrode of the voltage stabilizing capacitor by at least one insulating layer.

12. The display substrate of claim 9 , wherein
the pixel circuit further comprises a writing module, and the writing module is configured to write the driving voltage to the first electrode of the storage capacitor based on signals from a gate signal terminal and a data signal terminal; and the writing module comprises:
the second transistor;
the fourth transistor having the first electrode connected to the second electrode of the second transistor, a second electrode connected to a second electrode of the driving transistor, and the gate connected to the gate of the second transistor and the gate signal terminal;
a fifth transistor having a first electrode connected to a first electrode of the driving transistor, a second electrode connected to the data signal terminal, and a gate connected to the gate signal terminal;
a sixth transistor having a first electrode connected to a first power supply signal terminal, a second electrode connected

Assignees

• Chengdu Boe Optoelect Tech Co
• Boe Technology Group Co Ltd

Inventors

• Zhang Jingwen
• Xiao Yunsheng
• Wang Miao
• Pang Yuqian

Classifications

• H10K59/00

  Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00 · CPC title

• G09G2320/0626

  for control of overall brightness · CPC title

• G09G2320/0247

  Flicker reduction other than flicker reduction circuits used for single beam cathode-ray tubes · CPC title

• G09G2310/08

  Details of timing specific for flat panels, other than clock recovery · CPC title

• G09G2300/0842

  forming a memory circuit, e.g. a dynamic memory with one capacitor · CPC title