Fabricating photonics structure conductive pathways

US12449593B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-12449593-B2
Application numberUS-202017596775-A
CountryUS
Kind codeB2
Filing dateApr 16, 2020
Priority dateJun 18, 2019
Publication dateOct 21, 2025
Grant dateOct 21, 2025

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  1. Title

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  5. First independent claim

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Abstract

Official abstract text for this publication.

There is set forth herein a method including fabricating a photonics structure having one or more photonics device. The method can include forming one or more conductive material formation for communicating electrical signals to and/or from the one or more photonics device.

First claim

Opening claim text (preview).

What is claimed is: 1. A photonics device, comprising: a photonics dielectric stack on a substrate, the photonics dielectric stack including a dielectric layer and one or more photonics devices having a photosensitive material formation; a first dielectric material layer with a first portion thereof formed over the photosensitive material formation, and a second portion thereof formed over the dielectric layer of the dielectric stack; an etch stop layer over the first layer of dielectric material; and a second dielectric material layer over the etch stop layer, the second dielectric material layer including an etched trench over the photosensitive material formation wherein a bottom of the trench is delimited by the photosensitive material formation. 2. A method for fabricating the photonics device of claim 1 , comprising: depositing a layer of dielectric material so that a first portion of the layer of dielectric material is formed on a photosensitive material formation and so that a second portion of the layer of dielectric material is formed on a dielectric layer of a dielectric stack of a photonics structure having one or more photonics device; depositing an etch stop layer on the layer of dielectric material; forming a dielectric material layer on the etch stop layer; performing first etching of the dielectric material layer selective to the etch stop layer to define a trench over the photosensitive material formation; performing second etching of the etch stop layer, wherein the second etching removes material of the etch stop layer through a thickness of the etch stop layer and material of the layer of dielectric material through a portion of a thickness of the layer of dielectric material, the second etching increasing a depth of the trench; and performing plasmaless etching of a remaining thickness of the layer of dielectric material to reveal the photosensitive material formation so that a bottom of the trench is delimited by the photosensitive material formation. 3. The device of claim 1 , wherein the etched trench is formed by plasmaless etching. 4. The device of claim 1 , wherein the photosensitive material formation is germanium. 5. The device of claim 1 , wherein the etch stop layer is patterned such that no light signal propagating within the photonics device is coupled to the etch stop layer. 6. The device of claim 1 , further including an aluminum deposit within the trench having a planarized top surface thereof such that that top surface is defined by, at least, the dielectric stack and the aluminum deposit. 7. A photonics device, comprising: a photonics dielectric stack on a substrate and including a dielectric layer, the photonics dielectric stack including one or more photonics devices having a photosensitive material formation; a first dielectric material layer with a first portion thereof formed over the photosensitive material formation, and a second portion thereof formed over the dielectric layer of the dielectric stack; an etch stop layer over the first layer of dielectric material; a second dielectric material layer on the etch stop layer, the second dielectric material layer including an etched trench over the photosensitive material formation such that a bottom of the trench is delimited by the photosensitive material formation, the trench further including an upper region of wider diameter and a lower region of narrower diameter, the trench further including an aluminum deposit including a top surface thereof that is atomically smooth and planar, the top surface defined by a dielectric layer of the photonics dielectric stack and the aluminum. 8. The device of claim 7 , wherein the photonics device further having a bottom elevation thereof that is higher than an elevation of the planar top surface of the aluminum deposit. 9. The device of claim 8 , further including: one or more dielectric layers over the planar top surface; a layer of waveguiding material over the one or more dielectric layers such that the layer of waveguiding material defines the photonics device. 10. The device of claim 7 , further including a barrier layer comprised of a copper metallization layer, and wherein the trench is formed from etching through the barrier layer. 11. The device of claim 1 , further including an aluminum deposit within the trench having a planarized top surface thereof such that that top surface is defined by, at least, the dielectric stack and the aluminum deposit, and a metallization layer formation over the aluminum deposit and in electrical communication therewith. 12. The device of claim 1 , an aluminum deposit within the trench having a planarized top surface thereof such that that top surface is defined by, at least, the dielectric stack and the aluminum deposit, and a metallization layer formation over the aluminum deposit and in electrical communication therewith and further including a termination metallization layer formation at an elevation higher than an elevation of the metallization layer formation, the termination metallization layer formation in electrical communication with the metallization layer. 13. A method for fabricating the photonics device of claim 1 , wherein the method includes forming the etched trench by plasmaless etching. 14. The device of claim 1 , wherein an entirety of the first dielectric layer is formed above a top elevation of the photosensitive material formation. 15. The device of claim 1 , wherein the etch stop layer includes a truncated length truncated so that left and right ends of the etch stop layer is are substantially aligned over above, respectively, a left and right section of the trench in which the photosensitive material formation is formed. 16. The device of claim 1 , wherein the first dielectric layer extends horizontally at a common elevation throughout its length. 17. The photonics device of claim 1 , wherein the bottom of the trench is delimited by semiconductor material of the photosensitive material formation. 18. The photonics device of claim 7 , wherein the bottom of the trench is delimited by semiconductor material of the photosensitive material formation. 19. The photonics device of claim 7 , wherein the bottom of the trench is delimited by semiconductor material of the photosensitive material formation, wherein the semiconductor material delimiting the bottom of the trench includes semiconductor material of an ion implantation region of the photosensitive material formation. 20. A method for fabricating photonics device comprising: depositing a layer of dielectric material so that a first portion of the layer of dielectric material is formed on a photosensitive material formation and so that a second portion of the layer of dielectric material is formed on a dielectric layer of a dielectric stack of a photonics structure having one or more photonics device; depositing an etch stop layer on the layer of dielectric material; forming a dielectric material layer on the etch stop layer; performing first etching of the dielectric material layer selective to the etch stop layer to define a trench over the photosensitive material formation; performing second etching of the etch stop layer, wherein the second etching removes material of the etch stop layer through a thickness of the etch stop layer and material of the layer of dielectric material through a portion of a thickness of the layer of dielectric material, the second etching increasing a depth of the trench; and performing plasmaless etching of a remaining thic

Assignees

Inventors

Classifications

  • comprising two or more dielectric layers having different properties, e.g. different dielectric constants · CPC title

  • of multilayered thin functional dielectric layers · CPC title

  • by forming openings in the dielectric parts · CPC title

  • involving intermediate temporary filling with material · CPC title

  • by chemical means · CPC title

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Frequently asked questions

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What does patent US12449593B2 cover?
There is set forth herein a method including fabricating a photonics structure having one or more photonics device. The method can include forming one or more conductive material formation for communicating electrical signals to and/or from the one or more photonics device.
Who is the assignee on this patent?
Univ New York State Res Found
What technology area does this patent fall under?
Primary CPC classification H10F77/306. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Oct 21 2025 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 12 related publications on this page (citations in our corpus or others sharing the same primary CPC).