Circuit for determining the frequency of a signal

Patent metadata

Field	Value
Publication number	US-12449455-B2
Application number	US-202318493866-A
Country	US
Kind code	B2
Filing date	Oct 25, 2023
Priority date	Oct 26, 2022
Publication date	Oct 21, 2025
Grant date	Oct 21, 2025

Abstract

According to various embodiments, a circuit for determining the frequency of a signal is described, comprising an input configured to receive an analog input signal, an analog to digital converter configured to convert the analog input signal to a digital input signal, a digital mixer configured to generate a mixing result signal by mixing the digital input signal with a single bit binary signal having a reference frequency, a low pass filter configured to generate a filtered signal by filtering the mixing result signal, a measuring circuit configured to measure the period of the filtered signal and an output configured to output a value differing from the frequency of the single bit binary signal by the inverse of the measured period as the frequency to be determined.

First claim

What is claimed is:

1. A circuit for determining a frequency of a signal, comprising:
an input configured to receive an analog input signal;
an analog to digital converter configured to convert the analog input signal to a digital input signal;
a digital mixer configured to generate a mixing result signal by mixing the digital input signal with a single bit binary signal having a reference frequency;
a low pass filter configured to generate a filtered signal by filtering the mixing result signal;
a measuring circuit configured to measure a period of the filtered signal; and
an output configured to output a value of the frequency of the signal, wherein the frequency of the signal differs from the frequency of the single bit binary signal by a frequency offset determined by an inverse of the measured period.

2. The circuit of claim 1 , wherein the analog to digital converter comprises a sigma delta analog to digital converter.

3. The circuit of claim 2 , wherein the analog to digital converter comprises a cascaded integrator comb filter configured to generate the digital input signal from an output of the sigma delta analog to digital converter.

4. The circuit of claim 1 , wherein the digital input signal is a 16 bit or 32 bit digital signal.

5. The circuit of claim 1 , wherein the measuring circuit is configured to measure the period of the filtered signal by doubling a time between two zero crossings of the filtered signal.

6. The circuit of claim 1 , wherein the single bit binary signal is a signal alternating between 0 and 1 or is a signal alternating between −1 and 1.

7. The circuit of claim 1 , wherein the low pass filter is configured to filter out a component of the mixing result signal having a sum of the reference frequency and a frequency of the digital input signal when the frequency of the digital input signal differs from the reference frequency by less than 10 percent.

8. The circuit of claim 1 , further comprising a signal generation circuit configured to generate the single bit binary signal with the reference frequency.

9. The circuit of claim 1 , further comprising a multiplexer configured to forward signals to be monitored sequentially to the input.

10. The circuit of claim 1 , further comprising a clock divider configured to generate the analog input signal from a signal to be monitored by dividing a frequency of the signal to be monitored.

11. A method for determining the frequency of the signal comprising supplying the signal to the input of the circuit of claim 1 , wherein the reference frequency is set within a predetermined range of an expected frequency of the signal.

12. The method of claim 11 , further comprising determining the range depending on a predetermined desired sensitivity of the determination of the frequency.

13. A circuit, comprising:
an analog to digital converter having an input, and an output;
a digital mixer having a first input, a second input, and an output, the first input of the digital mixer coupled to the output of the analog to digital converter;
a low pass filter having an input and an output, the input of the low pass filter coupled to the output of the digital mixer; and
a period determination circuit having an input and an output, the input of the period determination circuit coupled to the output of the low pass filter; and
a binary signal generator having a single binary output, the single binary output coupled to the second input of the digital mixer.

14. The circuit of claim 13 , wherein the binary signal generator is configured to provide a binary signal having a reference frequency at the single binary output.

15. The circuit of claim 14 , wherein the binary signal generator is configured to generate the binary signal based on a frequency division of a reference frequency signal.

16. The circuit of claim 13 , wherein the analog to digital converter includes a sigma delta analog to digital converter having an input and an output, the input of the sigma delta analog to digital converter coupled to the input of the analog to digital converter.

17. The circuit of claim 16 , wherein the analog to digital converter further includes a cascaded integrator comb filter having an input and an output, the input of the cascaded integrator comb filter coupled to the output of the sigma delta analog to digital converter, and the output of the cascaded integrator comb filter coupled to the output of the analog to digital converter.

18. A circuit, comprising:
a digital mixer having a first input, a second input, and an output;
a low pass filter having an input and an output, the input of the low pass filter coupled to the output of the digital mixer; and
a measuring circuit having an input and an output, the input of the measuring circuit coupled to the output of the low pass filter;
wherein the measuring circuit is configured to measure a period of a signal received on the input of the measuring circuit, and output a frequency value based on the measured period and a reference frequency.

19. The circuit of claim 18 , wherein the digital mixer is configured to receive a binary signal having the reference frequency on the second input of the digital mixer.

20. The circuit of claim 18 , further comprising an analog to digital converter having an input, and an output coupled to the first input of the digital mixer, wherein the frequency value is associated with a signal received on the input of the analog to digital converter.

Assignees

• Infineon Technologies Ag

Inventors

• Wang Wei
• Augustin Michael
• Schäfer Jürgen
• König Dietmar
• Niederl Josef
• O'Neill Shane

Classifications

• G01R23/14

  by heterodyning; by beat-frequency comparison · CPC title

• G01R23/167 Primary

  with digital filters · CPC title