Display substrate for display device setting transition region between high pixel per inch region and low pixel per inch region

US12446399B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-12446399-B2
Application numberUS-202117615489-A
CountryUS
Kind codeB2
Filing dateFeb 3, 2021
Priority dateFeb 3, 2021
Publication dateOct 14, 2025
Grant dateOct 14, 2025

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A display substrate and a display device are disclosed. The display substrate includes: a transition region, located between a first display region and a second display region, the first display region, the second display region and the transition region are provided with a plurality of pixels, the plurality of pixels are arranged in an array in the first direction and a second direction intersecting with the first direction, a pixel per inch (PPI) of the first display region is greater than a PPI of the second display region and a PPI of the transition region, the transition region is further provided with a row driving circuit, the row driving circuit is configured to drive the plurality of pixels in the first display region, the second display region and the transition region by rows.

First claim

Opening claim text (preview).

The invention claimed is: 1. A display substrate, comprising: a first display region; a second display region, located on at least one side of the first display region in a first direction; and a transition region, located between the first display region and the second display region, wherein the first display region, the second display region and the transition region are provided with a plurality of pixels, the plurality of pixels are arranged in an array in the first direction and a second direction intersecting with the first direction, a pixel per inch (PPI) of the first display region is greater than a PPI of the second display region and a PPI of the transition region, the transition region comprises a row driving circuit, the row driving circuit comprises a gate driving circuit, the row driving circuit is configured to drive the plurality of pixels in the first display region, the second display region and the transition region in a row sequence, the row driving circuit comprises a plurality of row driving circuit units arranged in the second direction, each of the plurality of pixels comprises a plurality of sub-pixels, each of the plurality sub-pixels comprises an independent pixel driving circuit and a driving electrode electrically connected with the pixel driving circuit, and the transition region comprises: a plurality of pixel circuit islands, each of the plurality of pixel circuit islands being provided with a plurality of pixel driving circuits of at least one of the plurality of pixels; a plurality of first spacing regions, each of the plurality of first spacing regions being located between two pixel circuit islands adjacent in the first direction; and at least one driving spacing region, each of the at least one driving spacing region being also located between two pixel circuit islands adjacent in the first direction, the driving spacing region is provided with the row driving circuit unit, the transition region further comprises: a plurality of driving electrode islands, arranged corresponding to the plurality of pixel circuit islands, each of the plurality of driving electrode islands being provided with a plurality of driving electrodes of at least one of the plurality of pixels; and a plurality of second spacing regions, each of the plurality of second spacing regions being located between two driving electrode islands adjacent in the first direction, the plurality of first spacing regions have equal widths in the first direction, the plurality of second spacing regions have equal widths in the first direction, and a width of each of the plurality of first spacing regions in the first direction is less than a width of each of the at least one driving spacing region in the first direction. 2. The display substrate according to claim 1 , wherein a region located at a side of the second display region away from the transition region is provided with no gate driving circuit, the row driving circuit is located within the transition region. 3. The display substrate according to claim 1 , wherein the row driving circuit unit comprises a first row driving circuit unit and a second row driving circuit unit, the first row driving circuit unit has an output terminal, and the output terminal of the first row driving circuit unit is configured to simultaneously drive a plurality of the pixels belonging to a same row in the first display region, the second display region and the transition region. 4. The display substrate according to claim 1 , wherein a portion of the display substrate located in the second display region is bent in a direction perpendicular to the first display region. 5. The display substrate according to claim 1 , further comprising: a third display region, located at a side of the first display region in the second direction, wherein the third display region is provided with a plurality of the pixels, a PPI of the third display region is approximately equal to a PPI of the first display region, and an orthographic projection of the third display region on a reference line extending in the first direction overlaps with all of orthographic projections of the first display region, the second display region and the transition region on the reference line. 6. The display substrate according to claim 1 , wherein the second display region comprises: a plurality of pixel islands, arranged in an array in the first direction and the second direction, each of the plurality of pixel islands comprising at least one pixel; a first opening, extending in the first direction and located between two pixel islands adjacent in the second direction; and a second opening, extending in the second direction and located between two pixel islands adjacent in the first direction. 7. A display device comprising the display substrate according to claim 1 . 8. A display substrate, comprising: a first display region; a second display region, located on at least one side of the first display region in a first direction; and a transition region, located between the first display region and the second display region, wherein the first display region, the second display region and the transition region are provided with a plurality of pixels, the plurality of pixels are arranged in an array in the first direction and a second direction intersecting with the first direction, a pixel per inch (PPI) of the first display region is greater than a PPI of the second display region and a PPI of the transition region, the transition region comprises a row driving circuit, the row driving circuit comprises a gate driving circuit, the row driving circuit is configured to drive the plurality of pixels in the first display region, the second display region and the transition region in a row sequence, the row driving circuit comprises a plurality of row driving circuit units arranged in the second direction, each of the plurality of pixels comprises a plurality of sub-pixels, each of the plurality sub-pixels comprises an independent pixel driving circuit and a driving electrode electrically connected with the pixel driving circuit, and the transition region comprises: a plurality of pixel circuit islands, each of the plurality of pixel circuit islands being provided with a plurality of pixel driving circuits of at least one of the plurality of pixels; a plurality of first spacing regions, each of the plurality of first spacing regions being located between two pixel circuit islands adjacent in the first direction; and at least one driving spacing region, each of the at least one driving spacing region being also located between two pixel circuit islands adjacent in the first direction, the driving spacing region is provided with the row driving circuit unit, the transition region further comprises: a plurality of driving electrode islands, arranged corresponding to the plurality of pixel circuit islands, each of the plurality of driving electrode islands being provided with a plurality of driving electrodes of at least one of the plurality of pixels; and a plurality of second spacing regions, each of the plurality of second spacing regions being located between two driving electrode islands adjacent in the first direction, the plurality of first spacing regions have equal widths in the first direction, the plurality of second spacing regions have equal widths in the first direction, and a width of each of the plurality of second spacing regions in the first direction is 0.5-1.5 times a width of each of the at least one driving spacing regions, and a width of each of the plurality of first spacing regions in the first direction are less than a width of each of the at least one driving spacing region in the first direction.

Assignees

Inventors

Classifications

  • Improving the luminance or brightness uniformity across the screen · CPC title

  • Details of a shift registers arranged for use in a driving circuit · CPC title

  • with additional control of the display period without amending the charge stored in a pixel memory, e.g. by means of additional select electrodes · CPC title

  • forming a memory circuit, e.g. a dynamic memory with one capacitor · CPC title

  • used for counteracting undesired variations, e.g. feedback or autozeroing · CPC title

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What does patent US12446399B2 cover?
A display substrate and a display device are disclosed. The display substrate includes: a transition region, located between a first display region and a second display region, the first display region, the second display region and the transition region are provided with a plurality of pixels, the plurality of pixels are arranged in an array in the first direction and a second direction inters…
Who is the assignee on this patent?
Boe Technology Group Co Ltd, Beijing Boe Technology Dev Co Ltd
What technology area does this patent fall under?
Primary CPC classification H10K59/121. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Oct 14 2025 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 12 related publications on this page (citations in our corpus or others sharing the same primary CPC).