Display apparatus including dummy pixels in a non-display area

US12446308B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-12446308-B2
Application numberUS-202117445694-A
CountryUS
Kind codeB2
Filing dateAug 23, 2021
Priority dateAug 28, 2020
Publication dateOct 14, 2025
Grant dateOct 14, 2025

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A display apparatus includes: a substrate including: a first region; a second region; a first non-display area surrounding the first region and the second region; and a display area surrounding at least a portion of an outline of the first non-display area; a plurality of dummy pixels at the first non-display area, and to not emit light; a plurality of emission control lines connected to at least one of the plurality of dummy pixels; and a plurality of power supply lines to supply a driving voltage to the plurality of dummy pixels, respectively. One of the plurality of power supply lines is electrically connected to one of the plurality of emission control lines, and one of the plurality of power supply lines is connected to one of the plurality of dummy pixels.

First claim

Opening claim text (preview).

What is claimed is: 1. A display apparatus comprising: a substrate comprising: a first region; a second region; a first non-display area surrounding the first region and the second region; and a display area surrounding at least a portion of an outline of the first non- display area, at least a portion of which is inside the display area; a plurality of dummy pixels at the first non-display area, and configured to not emit light; a plurality of emission control lines connected to at least one of the plurality of dummy pixels; and a plurality of power supply lines configured to supply a driving voltage to the plurality of dummy pixels, respectively, wherein one of the plurality of power supply lines overlaps with one of the plurality of emission control lines in a thickness direction perpendicular to a display surface of the display area and is directly and electrically connected to the one of the plurality of emission control lines through a contact hole to supply the driving voltage to the one of the plurality of emission control lines, and the one of the plurality of power supply lines is connected to one of the plurality of dummy pixels. 2. The display apparatus of claim 1 , wherein at least one of the plurality of dummy pixels is between the first region and the second region. 3. The display apparatus of claim 1 , wherein the plurality of emission control lines and the plurality of power supply lines are at different layers from each other, and connected to each other through contact holes. 4. The display apparatus of claim 1 , wherein the plurality of emission control lines comprise a protrusion overlapping with the plurality of power supply lines in a plan view, the protrusion being connected to the plurality of power supply lines. 5. The display apparatus of claim 4 , wherein the plurality of power supply lines are connected to the protrusion through a contact hole. 6. The display apparatus of claim 1 , wherein the plurality of dummy pixels comprise a switching thin-film transistor, and wherein at least a portion of the switching thin-film transistor is disconnected. 7. The display apparatus of claim 1 , further comprising a plurality of data lines configured to transfer a data signal to the plurality of dummy pixels, wherein each of the plurality of dummy pixels comprises a switching thin-film transistor, and wherein the data lines are electrically insulated from the switching thin-film transistor. 8. The display apparatus of claim 1 , further comprising a plurality of pixels comprising: a pixel circuit comprising at least one transistor; and a display element connected to the pixel circuit, wherein each of the plurality of dummy pixels comprises an auxiliary pixel circuit comprising at least one dummy transistor. 9. The display apparatus of claim 8 , further comprising a pixel- defining layer on the pixel circuit, the pixel-defining layer having an opening corresponding to each of the plurality of pixels, wherein the pixel-defining layer comprises a flat top surface corresponding to the plurality of dummy pixels. 10. The display apparatus of claim 1 , further comprising an electronic element corresponding to at least one of the first region or the second region. 11. The display apparatus of claim 1 , wherein a size of the first region is different from a size of the second region. 12. The display apparatus of claim 1 , further comprising first and second driver circuits at a second non-display area surrounding at least a portion of the display area, wherein the first and second driver circuits face each other. 13. The display apparatus of claim 12 , wherein the substrate comprises long sides and short sides, and the first driver circuit and the second driver circuit are located in a direction along the long sides of the substrate.

Assignees

Inventors

Classifications

  • wherein the TFTs are in active matrices · CPC title

  • characterised by the compositions or shapes of the interlayer dielectrics · CPC title

  • H10D86/411Primary

    characterised by materials, geometry or structure of the substrates · CPC title

  • Peripheral sealing arrangements, e.g. adhesives, sealants · CPC title

  • having a particular composition, shape or crystalline structure of the active layer · CPC title

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Frequently asked questions

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What does patent US12446308B2 cover?
A display apparatus includes: a substrate including: a first region; a second region; a first non-display area surrounding the first region and the second region; and a display area surrounding at least a portion of an outline of the first non-display area; a plurality of dummy pixels at the first non-display area, and to not emit light; a plurality of emission control lines connected to at lea…
Who is the assignee on this patent?
Samsung Display Co Ltd
What technology area does this patent fall under?
Primary CPC classification H10D86/411. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Oct 14 2025 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 5 related publications on this page (citations in our corpus or others sharing the same primary CPC).