Combined MOS/MIS capacitor assembly

Patent metadata

Field	Value
Publication number	US-12446299-B2
Application number	US-202217969835-A
Country	US
Kind code	B2
Filing date	Oct 20, 2022
Priority date	Nov 1, 2021
Publication date	Oct 14, 2025
Grant date	Oct 14, 2025

Abstract

A combined metal-oxide-semiconductor (MOS) and metal-insulator-semiconductor (MIS) capacitor assembly is provided. The capacitor assembly includes a substrate comprising a semiconductor material; an oxide layer formed on a surface of the substrate; and an insulator layer formed over at least a portion of the oxide layer. The capacitor assembly further includes first and second conductive terminals, and a third terminal connected with the substrate. The oxide layer is connected in series between the substrate and the first conductive layer to form a first capacitor between the first terminal and the third terminal. The insulator layer is connected in series between the substrate and the second conductive layer to form a second capacitor between the second terminal and the third terminal.

First claim

What is claimed is:

1. A capacitor assembly comprising:
a substrate comprising a semiconductor material;
an oxide layer formed on a surface of the substrate;
an insulator layer formed over at least a portion of the oxide layer;
a first conductive layer formed over at least a portion of the oxide layer;
a second conductive layer formed over at least a portion of the insulator layer;
a first terminal connected with the first conductive layer;
a second terminal connected with the second conductive layer; and
a third terminal connected with the substrate;
wherein the oxide layer is connected in series between the substrate and the first conductive layer to form a first capacitor between the first terminal and the third terminal; and
wherein the insulator layer is connected in series between the substrate and the second conductive layer to form a second capacitor between the second terminal and the third terminal.

2. The capacitor assembly of claim 1 , wherein the insulator layer is formed from a dielectric material that is different from the oxide layer.

3. The capacitor assembly of claim 1 , wherein the insulator layer comprises a nitride layer.

4. The capacitor assembly of claim 3 , wherein the insulator layer comprises silicon nitride or silicon oxynitride.

5. The capacitor assembly of claim 1 , wherein the first terminal and the second terminal each have a length in an X-direction, further wherein a ratio of the length of the first terminal to the length of the second terminal is about 1:1.

6. The capacitor assembly of claim 5 , wherein the first terminal and the second terminal each have a width in a Y-direction perpendicular to the X-direction, further wherein a ratio of the width of the first terminal to the width of the second terminal is about 1:1.

7. The capacitor assembly of claim 1 , wherein the third terminal is connected with the substrate at a location that is spaced apart from the surface of the substrate in a Z-direction.

8. The capacitor assembly of claim 1 , wherein:
the first terminal is spaced apart from the second terminal in a X-direction and/or a Y-direction.

9. The capacitor assembly of claim 1 , wherein:
the insulator layer covers a first portion of the oxide layer that is distinct from a second portion of the oxide layer that is free of the insulator layer.

10. The capacitor assembly of claim 1 , wherein the first terminal comprises an electrically conductive material that directly contacts the oxide layer.

11. The capacitor assembly of claim 1 , wherein the first terminal comprises an electrically conductive material that directly contacts the insulator layer.

12. The capacitor assembly of claim 1 , wherein the semiconductor material of the substrate comprises silicon.

13. The capacitor assembly of claim 1 , wherein the oxide layer comprises silicon oxide.

14. The capacitor assembly of claim 1 , wherein first terminal and the second terminal have a same shape and size,
wherein the first capacitor has a first capacitance value and the second capacitor has a second capacitance value,
wherein the first capacitance value and the second capacitance value are unequal.

15. The capacitor assembly of claim 1 , further comprising an additional terminal formed over the oxide layer or the insulator layer.

16. The capacitor assembly of claim 15 , wherein the additional terminal is spaced apart from both the first terminal and the second terminal.

Assignees

• Kyocera Avx Components Corp

Inventors

• Nelson Cory

Classifications

• H10D1/692

  Electrodes · CPC title

• H10D84/212

  of only capacitors · CPC title

• H10D84/217 Primary

  of only conductor-insulator-semiconductor capacitors · CPC title

• H10D1/66 Primary

  Conductor-insulator-semiconductor capacitors, e.g. MOS capacitors · CPC title