Electronic device for updating frame error rate of link and operation method of electronic device

Patent metadata

Field	Value
Publication number	US-12445235-B2
Application number	US-202418437158-A
Country	US
Kind code	B2
Filing date	Feb 8, 2024
Priority date	Sep 8, 2021
Publication date	Oct 14, 2025
Grant date	Oct 14, 2025

Abstract

An embodiment of an electronic device according to the present disclosure may comprise: a communication circuit for transmitting or receiving data through a plurality of links; a memory for storing mapping data in which data rates and frame error rates for the plurality of links are mapped; and a processor operatively connected to the communication circuit and the memory, wherein the processor is configured to: in response to a request for transmitting a packet corresponding to a first type, identify a link, through which the number of packets less than a predesignated value have been transmitted or received, from among the plurality of links; transmit or receive a plurality of packets corresponding to a second type through the identified link; identify frame error rates for the plurality of packets corresponding to the second type; and update the mapping data on the basis of the identified frame error rates.

First claim

The invention claimed is:

1. An electronic device, comprising:
a communication circuit configured to transmit or receive data through a plurality of links established between an external electronic device and the electronic device;
a memory configured to store mapping data in which a data rate and a frame error rate for the plurality of links are mapped; and
a processor operatively connected to the communication circuit and the memory,
wherein the processor is configured to:
identify a link that has transmitted or received a number of packets smaller than a designated value among the plurality of links in response to a request for transmission of packets of a first type,
transmit or receive a plurality of packets of a second type through the identified link,
identify a frame error rate for the plurality of packets of the second type, and
update the mapping data based on the identified frame error rate.

2. The electronic device of claim 1 , wherein the processor is configured to:
determine a data rate of a packet of the first type based on the mapping data, and
generate a packet of the first type based on the determined data rate.

3. The electronic device of claim 1 , wherein the processor is configured to:
identify another link that has transmitted or received a number of packets smaller than a designated value among the plurality of links in response to a request for transmission of packets of the first type,
transmit a plurality of packets of the second type through the another link,
identify a frame error rate for the plurality of packets of the second type, and
update the mapping data based on the identified frame error rate.

4. The electronic device of claim 1 , wherein the processor is configured to:
identify a number of packets transmitted or received during a designated time through each of the plurality of links, and
store counting data in which each of the plurality of links and the number of the identified packets are mapped in the memory.

5. The electronic device of claim 4 , wherein the processor is configured to:
identify a link in which transmitted packets are less than or equal to the designated value based on the counting data among the plurality of links, and
transmit a plurality of packets of the second type through the identified link.

6. The electronic device of claim 4 , wherein the processor is configured to:
identify a link in which received packets are less than or equal to the designated value based on the counting data among the plurality of links, and
receive a plurality of packets of the second type through the identified link.

7. The electronic device of claim 1 , wherein the processor is configured to transmit a packet of the second type through at least one link of the plurality of links when transmission of a packet of the first type is completed.

8. The electronic device of claim 1 , wherein the processor is configured to:
select a link to be used for transmitting a packet of the first type among the plurality of links based on timer information related to duration of an idle state for the plurality of links, and
transmit a packet of the first type at a transmission rate lower than a transmission rate of the selected link transmitting or receiving packets of the number smaller than the designated value.

9. The electronic device of claim 1 , wherein the processor is configured to transmit a plurality of packets of the second type through the plurality of links in which the number of packets transmitted or received through the identified link is greater than or equal to the designated value while transmitting a plurality of packets of the second type.

10. The electronic device of claim 1 , wherein the processor is configured to:
select a link to be first switched to an idle state among the plurality of links before transmitting a packet of the first type, and
transmit a packet of the first type through the selected link.

11. The electronic device of claim 1 , wherein a packet of the first type is a packet requiring a higher transmission rate than that of a packet of the second type or a packet requiring a lower delay time than that of the packet of the second type.

12. The electronic device of claim 1 , wherein the processor is configured to:
control the communication circuit to transmit a request message for transmitting or receiving a plurality of packets of the second type, and
update the mapping data based on receiving a response message to the request message through the identified link.

13. A method of operating an electronic device, the method comprising:
identifying a link that has transmitted or received a number of packets smaller than a designated value among a plurality of links established between the electronic device and an external electronic device in response to a request for transmission of packets of a first type;
transmitting or receiving a plurality of packets of a second type to or from the external electronic device through the identified link;
identifying a frame error rate for a plurality of packets of the second type; and
updating the mapping data based on the identified frame error rate.

14. The method of claim 13 , further comprising:
determining a data rate of a packet of the first type based on the mapping data; and
generating a packet of the first type based on the determined data rate.

15. The method of claim 13 , further comprising:
identifying another link that has transmitted or received a number of packets smaller than a designated value among the plurality of links in response to a request for transmission of packets of the first type;
transmitting a plurality of packets of the second type through the another link;
identifying a frame error rate for a plurality of packets of the second type; and
updating the mapping data based on the identified frame error rate.

16. The method of claim 13 , further comprising:
identifying a number of packets transmitted or received during a designated time through each of the plurality of links; and
storing counting data in which each of the plurality of links and the number of identified packets are mapped in a memory.

17. The method of claim 16 , further comprising:
identifying a link in which transmitted packets are less than or equal to the designated value among the plurality of links based on the counting data; and
transmitting a plurality of packets of the second type through the identified link.

18. The method of claim 16 , further comprising:
identifying a link in which received packets are less than or equal to the designated value among the plurality of links based on the counting data; and
receiving a plurality of packets of the second type through the identified link.

19. The method of claim 13 , further comprising transmitting a packet of the second type through at least one link of the plurality of links when transmission of a packet of the first type is completed.

20. The method of claim 13 , further comprising:
selecting a link to be used for transmitting a packet of the first type among the plurality of links based on timer information related to duration of an idle state for the plurality of links; and
transmitting a packet of the first type at a transmission rate lower than a transmission rate of the selected link transmitting or receiving packets of the number smaller than the designated value.

Assignees

• Samsung Electronics Co Ltd

Inventors

• Choi Junsu
• Yang Changmok
• Nam Chounjong
• Min Sungbin
• Jeong Mincheol
• Jung Junyeop

Classifications

• H04L43/16 Primary

  Threshold monitoring · CPC title

• H04L1/0013

  Rate matching, e.g. puncturing or repetition of code symbols · CPC title

• H04L1/0019

  in which mode-switching is based on a statistical approach · CPC title

• H04L1/0009

  by adapting the channel coding (H04L1/1812 takes precedence) · CPC title

• H04L1/0003

  by switching between different modulation schemes · CPC title