Turbo decoder, operating method thereof, and electronic device including turbo decoder

Patent metadata

Field	Value
Publication number	US-12445156-B2
Application number	US-202318499625-A
Country	US
Kind code	B2
Filing date	Nov 1, 2023
Priority date	Nov 2, 2022
Publication date	Oct 14, 2025
Grant date	Oct 14, 2025

Abstract

A turbo decoder includes a first soft input soft output (SISO) decoder configured to receive systematic information, first parity information, and a first pre-log likelihood ratio (LLR), and to output a first parity LLR obtained by calculating an LLR for the first parity information, a first interleaver configured to interleave the systematic information, a second SISO decoder configured to receive an output of the first interleaver, second parity information, and a second pre-LLR, and to output a second parity LLR obtained by calculating an LLR for the second parity information, and an interference canceller configured to receive the first parity LLR from the first SISO decoder, receive the second parity LLR from the second SISO decoder, and calculate a first update parity LLR and a second update parity LLR.

First claim

What is claimed is:

1. A turbo decoder comprising:
a first soft input soft output (SISO) decoder configured to receive systematic information, first parity information, and a first pre-log likelihood ratio (pre-LLR), and to output a first parity log likelihood ratio (LLR) obtained by calculating an LLR for the first parity information;
an interleaver configured to interleave the systematic information;
a second SISO decoder configured to receive an output of the interleaver, second parity information, and a second pre-LLR, and to output a second parity LLR obtained by calculating an LLR for the second parity information; and
an interference canceller configured to receive the first parity LLR from the first SISO decoder, receive the second parity LLR from the second SISO decoder, and calculate a first update parity LLR and a second update parity LLR,
wherein the turbo decoder uses the first and second update parity LLRs to derive decoded output data corresponding to the systematic information.

2. The turbo decoder of claim 1 , wherein the first SISO decoder further outputs a first post-LLR, and the turbo decoder further comprises a subtractor configured to subtract the first pre-LLR from the first post-LLR to thereby obtain a first extrinsic LLR.

3. The turbo decoder of claim 1 , wherein the interference canceller is further configured to generate the first and second update parity LLRs based on cancellation of inter-layer interference in a multi input multi output (MIMO) channel, provide the first update parity LLR to the first SISO decoder, and provide the second update parity LLR to the second SISO decoder.

4. The turbo decoder of claim 3 , wherein the first SISO decoder is further configured to calculate a first post-LLR on the basis of the first update parity LLR, the systematic information, and the first pre-LLR, and
the second SISO decoder is further configured to calculate a second post-LLR on the basis of the second update parity LLR, the output of the interleaver, and the second pre-LLR.

5. The turbo decoder of claim 4 , wherein the interleaver is a first interleaver, the turbo decoder further includes a second interleaver, the first pre-LLR is obtained by de-interleaving, via a first de-interleaver, a second extrinsic LLR obtained by subtracting the second pre-LLR from the second post-LLR, and
the second pre-LLR is obtained by interleaving, via the second interleaver, a first extrinsic LLR obtained by subtracting the first pre-LLR from the first post-LLR.

6. The turbo decoder of claim 5 , further comprising a second de-interleaver configured to de-interleave the second post-LLR which is an output of the second SISO decoder, wherein the turbo decoder is configured to generate a decoded signal representing the output data by performing a hard decision on the basis of an output of the second de-interleaver.

7. A turbo decoder comprising:
a first soft input soft output (SISO) decoder configured to receive systematic information, first parity information, and a first pre-log likelihood ratio (pre-LLR), and to output a first parity LLR obtained by calculating a log likelihood ratio (LLR) for the first parity information;
an interleaver configured to interleave the systematic information;
a second SISO decoder configured to receive an output of the first-interleaver, second parity information, and a second pre-LLR, and to output a second parity LLR obtained by calculating an LLR for the second parity information;
a first interference canceller configured to receive the first parity LLR from the first SISO decoder, receive the second parity LLR from the second SISO decoder, and calculate a first update parity LLR and a second update parity LLR; and
a second interference canceller configured to receive the first parity LLR from the first SISO decoder, receive the second parity LLR from the second SISO decoder, and calculate a third update parity LLR and a fourth update parity LLR,
wherein the turbo decoder uses the first through fourth update parity LLRs to derive decoded output data corresponding to the systematic information.

8. The turbo decoder of claim 7 , wherein the first SISO decoder further outputs a first post-LLR, and the turbo decoder further comprises a first subtractor configured to subtract the first pre-LLR from the first post-LLR to generate a first extrinsic LLR, and
the second SISO decoder further outputs a second post-LLR, and the turbo decoder further comprises a second subtractor configured to subtract the second pre-LLR, which is an input of the second SISO decoder, from the second post-LLR to generate a second extrinsic LLR.

9. The turbo decoder of claim 7 , wherein the first interference canceller is further configured to generate the first and second update parity LLRs based on cancellation of inter-layer interference in a multi input multi output (MIMO) channel, provide the first update parity LLR to the first SISO decoder, and provide the second update parity LLR to the second SISO decoder, and
the second interference canceller is further configured to generate the third and fourth update parity LLRs based on cancellation of inter-layer interference in the MIMO channel, provide the third update parity LLR to the first SISO decoder, and provide the fourth update parity LLR to the second SISO decoder.

10. The turbo decoder of claim 9 , wherein the first SISO decoder is further configured to calculate a first post-LLR on the basis of the first update parity LLR, the third update parity LLR, the systematic information, and the first pre-LLR,
the second SISO decoder is further configured to calculate a second post-LLR on the basis of the second update parity LLR, the fourth update parity LLR, the output of the first interleaver, and the second pre-LLR.

11. The turbo decoder of claim 10 , wherein the interleaver is a first interleaver, the turbo decoder further comprises a second interleaver, the first pre-LLR is obtained by de-interleaving, via a first de-interleaver, a second extrinsic LLR obtained by subtracting the second pre-LLR from the second post-LLR, and
the second pre-LLR is obtained by interleaving, via the second interleaver, a first extrinsic LLR obtained by subtracting the first pre-LLR from the first post-LLR.

12. The turbo decoder of claim 9 , wherein the first SISO decoder is further configured to output a first post-LLR on the basis of the third update parity LLR, the systematic information, and the first pre-LLR.

13. An operating method of a turbo decoder included in a reception device and comprising a first soft input soft output (SISO) decoder, a second SISO decoder, and an interference canceller, the operating method comprising:
receiving, by the first SISO decoder, first parity information, first systematic information, and a first pre-log likelihood ratio (LLR);
providing, to the interference canceller by the first SISO decoder, a first parity LLR generated by calculating an LLR for the first parity information;
providing, to the interference canceller by the second SISO decoder, a second parity LLR generated by calculating an LLR for second parity information on the basis of received second parity information and second systematic information;
obtaining a first extrinsic LLR by subtracting the first pre-LLR from a first post-LLR which is an output of the first SISO decoder;
generating, by the interference canceller, a first update parity LLR and a second update parity LLR on the basis of the first parity LLR and the second parity LLR; and
providing, by the interference canceller, the first update parity LLR to the first SISO decoder and providing the second update parity LLR to the second

Assignees

• Samsung Electronics Co Ltd

Inventors

• Kim Joohan
• Kim Hoil

Classifications

• H03M13/2957 Primary

  Turbo codes and decoding · CPC title

• H04L1/0061

  Error detection codes · CPC title

• H04L25/03286

  with channel-decoding circuitry · CPC title

• H04L25/0328

  with interference cancellation circuitry (adaptations for interference cancellation within a sequence estimator H04L25/03305; interference related aspects of direct sequence spread spectrum H04B1/7097; interference related aspects of frequency hopping spread spectrum H04B1/715; see also H04B1/10) · CPC title

• H03M13/6522

  Intended application, e.g. transmission or communication standard · CPC title