Snubber circuit

Patent metadata

Field	Value
Publication number	US-12445047-B2
Application number	US-202318395263-A
Country	US
Kind code	B2
Filing date	Dec 22, 2023
Priority date	Dec 30, 2022
Publication date	Oct 14, 2025
Grant date	Oct 14, 2025

Abstract

Provided is a snubber circuit. The snubber circuit may include a first snubber diode connected to a first node connected to a DC-DC converter, a snubber capacitor connected between the first snubber diode and a second node connected to the DC-DC converter, a snubber voltage source connected to the first node, a snubber inductor connected to a third node between the first snubber diode and the snubber capacitor, and a second snubber diode connected between the snubber inductor and the snubber voltage source.

First claim

What is claimed is:

1. A snubber circuit comprising:
a first snubber diode connected to a first node connected to a DC-DC converter;
a snubber capacitor connected between the first snubber diode and a second node connected to the DC-DC converter;
a snubber voltage source connected to the first node;
a snubber inductor connected to a third node between the first snubber diode and the snubber capacitor; and
a second snubber diode connected between the snubber inductor and the snubber voltage source.

2. The snubber circuit of claim 1 , wherein the snubber voltage source is configured to supply a voltage that is 0.25 times an input voltage of the DC-DC converter.

3. The snubber circuit of claim 1 , wherein the snubber capacitor is connected in parallel to a parasitic capacitor of a switch included in the DC-DC converter.

4. The snubber circuit of claim 1 , wherein a capacitance of the snubber capacitor is 10 times or more than a capacitance of a parasitic capacitor of a switch included in the DC-DC converter.

5. The snubber circuit of claim 1 , wherein, when a voltage at both ends of the snubber inductor is 0.25 times an input voltage of the DC-DC converter, resonance occurs in the snubber inductor and the snubber capacitor.

6. The snubber circuit of claim 5 , wherein the snubber capacitor is charged according to the resonance.

7. The snubber circuit of claim 1 , wherein, when a voltage at both ends of the snubber inductor is −0.25 times an input voltage of the DC-DC converter, a current of the snubber inductor becomes 0 A.

8. The snubber circuit of claim 7 , wherein, when a conversion ratio of the DC-DC converter is less than 0.5 and the current of the snubber inductor becomes 0 A, the snubber capacitor is charged to a voltage that is 0.5 times the input voltage of the DC-DC converter, and
when the conversion ratio of the DC-DC converter is greater than 0.5 and the current of the snubber inductor becomes 0 A, the snubber capacitor is charged to a voltage that is identical to the input voltage of the DC-DC converter.

9. The snubber circuit of claim 8 , wherein, when the conversion ratio of the DC-DC converter is less than 0.5 and a switch of the DC-DC converter is turned off, the snubber capacitor charged to the voltage that is 0.5 times the input voltage of the DC-DC converter is discharged to 0 V, and
when the conversion ratio of the DC-DC converter is greater than 0.5 and the switch of the DC-DC converter is turned off, the snubber capacitor charged to the voltage that is identical to the input voltage of the DC-DC converter is discharged to the voltage that is 0.5 times the input voltage of the DC-DC converter.

10. The snubber circuit of claim 1 , wherein, when a conversion ratio of the DC-DC converter is less than 0.5, a voltage of the first node is maintained to be 0.5 times an input voltage of the DC-DC converter or at 0 V, and
when the conversion ratio of the DC-DC converter is greater than 0.5, the voltage of the first node is maintained to be identical to or 0.5 times the input voltage of the DC-DC converter.

11. The snubber circuit of claim 1 , wherein, when a switch of the DC-DC converter is turned off, a voltage slope at both ends of the switch according to time is determined based on a size of a capacitance of the snubber capacitor and an inductor current of the DC-DC converter.

12. A snubber circuit comprising:
a snubber capacitor connected in parallel to a parasitic capacitor of a switch of a DC-DC converter;
a snubber inductor configured to cause resonance with the snubber capacitor;
a first snubber diode;
a second snubber diode; and
a snubber voltage source,
wherein the snubber capacitor is discharged when the switch of the DC-DC converter is turned off.

13. The snubber circuit of claim 12 , wherein the snubber voltage source is configured to supply a voltage that is 0.25 times an input voltage of the DC-DC converter.

14. The snubber circuit of claim 12 , wherein a capacitance of the snubber capacitor is 10 times or more than a capacitance of the parasitic capacitor of the switch included in the DC-DC converter.

15. The snubber circuit of claim 12 , wherein, when a voltage at both ends of the snubber inductor is 0.25 times an input voltage of the DC-DC converter, resonance occurs in the snubber inductor and the snubber capacitor.

16. The snubber circuit of claim 15 , wherein the snubber capacitor is charged according to the resonance.

17. The snubber circuit of claim 12 , wherein, when a conversion ratio of the DC-DC converter is less than 0.5 and a current of the snubber inductor becomes 0 A, the snubber capacitor is charged to a voltage that is 0.5 times an input voltage of the DC-DC converter, and
when the conversion ratio of the DC-DC converter is greater than 0.5 and the current of the snubber inductor becomes 0 A, the snubber capacitor is charged to a voltage that is identical to the input voltage of the DC-DC converter.

18. A plasma generator comprising:
a DC-DC converter configured to generate a middle voltage by converting an input direct current (DC) voltage;
a snubber circuit connected to the DC-DC converter;
a radio frequency (RF) generator configured to generate an alternating current (AC) voltage in response to receiving the middle voltage; and
a chamber in which plasma is generated based on the AC voltage,
wherein the snubber circuit comprises a first snubber diode connected to a first node connected to the DC-DC converter, a snubber capacitor connected between the first snubber diode and a second node connected to the DC-DC converter, a snubber voltage source connected to the first node, a snubber inductor connected to a third node between the first snubber diode and the snubber capacitor, and a second snubber diode connected between the snubber inductor and the snubber voltage source.

19. The plasma generator of claim 18 , wherein the DC-DC converter is configured to generate, based on an input voltage, the middle voltage by increasing a voltage while forming a voltage slope.

20. The plasma generator of claim 18 , wherein the snubber voltage source is configured to supply a voltage that is 0.25 times an input voltage of the DC-DC converter.

Assignees

• Semes Co Ltd
• Korea Advanced Inst Sci & Tech

Inventors

• Zhang Aixian
• Lee Junghwan
• Kim Jaehyun
• Lee Jiho
• Cho Gyuhyeong

Classifications

• H02M3/158

  including plural semiconductor devices as final control devices for a single load · CPC title

• H05H1/4645 Primary

  Radiofrequency discharges · CPC title

• Y02B70/10

  Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes · CPC title

• H02M1/0048

  Circuits or arrangements for reducing losses (using snubbers H02M1/34) · CPC title

• H01J37/32082

  Radio frequency generated discharge (H01J37/32357, H01J37/32366, H01J37/32394 and H01J37/32403 take precedence) · CPC title