Display panel comprising a substrate including a first region and a second region and display apparatus having the same

Patent metadata

Field	Value
Publication number	US-12444722-B2
Application number	US-202217943989-A
Country	US
Kind code	B2
Filing date	Sep 13, 2022
Priority date	Sep 30, 2021
Publication date	Oct 14, 2025
Grant date	Oct 14, 2025

Abstract

Provided is a display panel fabricated with a hybrid semiconductor circuit in a substrate, including a c-Si circuits and a compound semiconductor circuit arranged in separate regions on the substrate. Row scanning circuits of the display panel are fabricated with the c-Si transistors and pixel array of the display panel is fabricated with the compound semiconductor transistors. This arrangement allows low voltage driven CMOS circuit and high voltage driven pixel circuits being integrated together in one substrate.

First claim

What is claimed is:

1. A display panel, comprising a single-crystal silicon (c-Si) substrate which comprises a first region and a second region;
wherein the first region comprises a c-Si transistor circuit fabricated in the c-Si substrate, and the c-Si transistor circuit comprises a signal processing circuit and a control circuit of the display panel;
wherein the second region comprises an array of pixel circuits of the display panel and a light-emitting layer superimposed above the array of pixel circuits, the array of pixel circuits is fabricated in the c-Si substrate and comprises a plurality of compound semiconductor thin-film transistors, and the light-emitting layer which is controlled by the array of pixel circuits comprises at least one of the followings: an OLED film, an inorganic LED chip, a nano-sized light-emitting particle or an inorganic electroluminescent film;
wherein the first region or the second region further comprises row scanning circuits located on one side or two sides of the array of pixel circuits;
wherein the array of pixel circuits further comprises a plurality of c-Si transistors, and the light-emitting layer comprises a hybrid light-emitting layer including the OLED film and the inorganic LED chip; and
wherein the OLED film is driven by the plurality of compound semiconductor thin-film transistors, and the inorganic LED chip is driven by the plurality of c-Si transistors in the array of pixel circuits.

2. The display panel of claim 1 , wherein the row scanning circuits which are located in the second region comprise a plurality of thin-film transistors.

3. The display panel of claim 1 , wherein a semiconductor material used in each of the compound semiconductor thin-film transistors comprises one of the following materials:
a metal oxide semiconductor material comprising ZnO, CdO, MgO or indium gallium zinc oxide (IGZO);
a group II-IV compound semiconductor material comprising ZnSe, ZnS, ZnTe, CdSe, CdTe or CdS; or
a group III-V compound semiconductor material comprising GaAs, GaP, InAs or InP.

4. The display panel of claim 1 , wherein a polysilicon gate of each of the c-Si transistors and a polysilicon gate of each of the compound semiconductor thin-film transistors are manufactured simultaneously.

5. The display panel of claim 1 , wherein each of the compound semiconductor thin-film transistors is a double-gate thin-film transistor comprising a bottom gate and a top gate; and
wherein the top gate is connected to the bottom gate or is in an electrically floating state.

6. The display panel of claim 5 , wherein a top gate dielectric layer has a greater thickness than a bottom gate dielectric layer.

7. The display panel of claim 1 , wherein each of the compound semiconductor thin-film transistors has a channel length of less than 0.5 microns.

8. A display apparatus, comprising a display panel, wherein the display panel comprises a single-crystal silicon (c-Si) substrate which comprises a first region and a second region;
wherein the first region comprises a c-Si transistor circuit fabricated in the c-Si substrate, and the c-Si transistor circuit comprises a signal processing circuit and a control circuit of the display panel;
wherein the second region comprises an array of pixel circuits of the display panel and a light-emitting layer superimposed above the array of pixel circuits, the array of pixel circuits is fabricated in the c-Si substrate and comprises a plurality of compound semiconductor thin-film transistors, and the light-emitting layer which is controlled by the array of pixel circuits comprises at least one of the followings: an OLED film, an inorganic LED chip, a nano-sized light-emitting particle or an inorganic electroluminescent film;
wherein the first region or the second region further comprises row scanning circuits located on one side or two sides of the array of pixel circuits;
wherein the array of pixel circuits further comprises a plurality of c-Si transistors, and the light-emitting layer comprises a hybrid light-emitting layer including the OLED film and the inorganic LED chip; and
wherein the OLED film is driven by the plurality of compound semiconductor thin-film transistors, and the inorganic LED chip is driven by the plurality of c-Si transistors in the array of pixel circuits.

Assignees

• Seeya Optronics Co Ltd

Inventors

• Huang Zhongshou

Classifications

• H10W90/00 Primary

  Package configurations · CPC title

• H10D86/471

  having different architectures, e.g. having both top-gate and bottom-gate TFTs · CPC title

• H10D86/60

  wherein the TFTs are in active matrices · CPC title

• H10K59/1213 Primary

  the pixel elements being TFTs · CPC title

• H10D87/00

  Integrated devices comprising both bulk components and either SOI or SOS components on the same substrate · CPC title