Method and apparatus for high-performance page-fault handling for multi-tenant scalable accelerators

US12443477B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-12443477-B2
Application numberUS-202117560170-A
CountryUS
Kind codeB2
Filing dateDec 22, 2021
Priority dateJul 27, 2021
Publication dateOct 14, 2025
Grant dateOct 14, 2025

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  5. First independent claim

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

Apparatus and method for high-performance page fault handling. For example, one embodiment of an apparatus comprises: one or more accelerator engines to process work descriptors submitted by clients to a plurality of work queues; fault processing hardware logic associated with the one or more accelerator engines, the fault processing hardware logic to implement a specified page fault handling mode for each work queue of the plurality of work queues, the page fault handling modes including a first page fault handling mode and a second page fault handling mode.

First claim

Opening claim text (preview).

What is claimed is: 1. An apparatus comprising: one or more accelerator engines to process work descriptors submitted by clients to a plurality of work queues; and fault processing hardware logic associated with the one or more accelerator engines, the fault processing hardware logic to implement a specified page fault handling mode for each work queue of the plurality of work queues, page fault handling modes for the plurality of work queues including a first page fault handling mode and a second page fault handling mode, wherein upon a page fault occurring on an address associated with a completion record buffer, information associated with the page fault is submitted to an event log but not the completion record buffer. 2. The apparatus of claim 1 , wherein in the first page fault handling mode, the fault processing hardware logic is to notify a client and terminate processing of a work descriptor associated with the page fault. 3. The apparatus of claim 1 wherein the information is to allow a client to continue processing or re-submit work associated with a work descriptor if the work was only partially completed due to the page fault. 4. The apparatus of claim 3 wherein the information comprises a fault-address and a bytes completed field to indicate a number of source bytes processed before the page fault occurred. 5. The apparatus of claim 1 wherein the event log is to be associated with a particular accelerator engine of the one or more accelerator engines or a particular work queue of the plurality of work queues. 6. The apparatus of claim 1 wherein in the second page fault handling mode, processing of a work descriptor is to be paused and the fault processing hardware logic is to generate a page request to memory management hardware logic, the processing of the work descriptor to resume only after receiving a response from the memory management hardware logic. 7. A method comprising: processing work descriptors by an accelerator engine, the work descriptors submitted by clients to a plurality of work queues; and in response to detecting a page fault associated with a work descriptor in a work queue: determining a page fault handling mode associated with the work queue, and notifying a client who submitted the work descriptor and terminating processing of the work descriptor associated with the page fault if the page fault handling mode comprises a first page fault handling mode, wherein if the page fault occurs on an address associated with a completion record buffer, information associated with the page fault is submitted to an event log but not the completion record buffer. 8. The method of claim 7 further comprising: if the page fault handling mode comprises a second page fault handling mode, performing operations of: pausing work associated with the work descriptor and transmitting a page fault request to memory management hardware logic, and resuming the work associated with the work descriptor after receiving a response from the memory management hardware logic. 9. The method of claim 7 wherein, based on the information, the client is to continue processing or re-submit work associated with the work descriptor if the work was only partially completed due to the page fault. 10. The method of claim 9 wherein the information comprises a fault-address and a bytes completed field to indicate a number of source bytes processed before the page fault occurred. 11. The method of claim 7 wherein information associated with a page fault for a second work descriptor is also submitted to the event log but not the completion record buffer. 12. The method of claim 11 wherein at least one work descriptor comprises a batch descriptor comprising a descriptor list address identifying a memory location of a batch of descriptors or a drain descriptor to cause the accelerator engine to wait for completion of specified preceding descriptors in the work queue before processing the drain descriptor. 13. A non-transitory machine-readable medium having program code stored thereon which, when executed by a machine, causes the machine to perform: processing work descriptors by an accelerator engine, the work descriptors submitted by clients to a plurality of work queues; and in response to detecting a page fault associated with a work descriptor in a work queue: determining a page fault handling mode associated with the work queue, and notifying a client who submitted the work descriptor and terminating processing of the work descriptor associated with the page fault if the page fault handling mode comprises a first page fault handling mode, wherein if the page fault occurs on an address associated with a completion record buffer, information associated with the page fault and usable by a client and/or system software to resolve the page fault is submitted to an event log but not the completion record buffer. 14. The non-transitory machine-readable medium of claim 13 , wherein the machine is caused to further perform: if the page fault handling mode comprises a second page fault handling mode, performing: pausing work associated with the work descriptor and transmitting a page fault request to memory management hardware logic, and resuming the work associated with the work descriptor after receiving a response from the memory management hardware logic. 15. The non-transitory machine-readable medium of claim 13 wherein, based on the information, the client is to continue processing or re-submit work associated with the work descriptor if the work was only partially completed due to the page fault. 16. The non-transitory machine-readable medium of claim 15 wherein the information comprises a fault-address and a bytes completed field to indicate a number of source bytes processed before the page fault occurred. 17. The non-transitory machine-readable medium of claim 13 wherein information associated with a page fault for a second work descriptor is also submitted to the event log but not the completion record buffer. 18. The non-transitory machine-readable medium of claim 17 wherein at least one work descriptor comprises a batch descriptor comprising a descriptor list address identifying a memory location of a batch of descriptors or a drain descriptor to cause the accelerator engine to wait for completion of specified preceding descriptors in the work queue before processing the drain descriptor.

Assignees

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Classifications

  • Routing of error reports, e.g. with a specific transmission path or data flow · CPC title

  • Content or structure details of the error report, e.g. specific table structure, specific error fields · CPC title

  • for peripheral access to main memory, e.g. direct memory access [DMA] · CPC title

  • using page tables, e.g. page table structures · CPC title

  • G06F11/079Primary

    Root cause analysis, i.e. error or fault diagnosis (in a hardware test environment G06F11/22; in a software test environment G06F11/36) · CPC title

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What does patent US12443477B2 cover?
Apparatus and method for high-performance page fault handling. For example, one embodiment of an apparatus comprises: one or more accelerator engines to process work descriptors submitted by clients to a plurality of work queues; fault processing hardware logic associated with the one or more accelerator engines, the fault processing hardware logic to implement a specified page fault handling m…
Who is the assignee on this patent?
Intel Corp
What technology area does this patent fall under?
Primary CPC classification G06F11/079. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Oct 14 2025 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 6 related publications on this page (citations in our corpus or others sharing the same primary CPC).