Display panel and display apparatus including the same

Patent metadata

Field	Value
Publication number	US-12439789-B2
Application number	US-202418900609-A
Country	US
Kind code	B2
Filing date	Sep 27, 2024
Priority date	Oct 6, 2020
Publication date	Oct 7, 2025
Grant date	Oct 7, 2025

Abstract

A display panel includes: a display area including a main display area, and a component area; a peripheral area; a plurality of main pixel circuits at the main display area; a plurality of main gate lines extending in a first direction, and connected to the main pixel circuits; a plurality of main data lines extending in a second direction, and connected to the main pixel circuits; a plurality of auxiliary display elements at the component area; a plurality of auxiliary pixel circuits at the periphery area, and connected to the auxiliary display elements; a plurality of auxiliary gate lines connected to the auxiliary pixel circuits, and to main gate lines that are adjacent to the component area in the first direction; and a plurality of auxiliary data lines connected to the auxiliary pixel circuits, and to main data lines that are adjacent to the component area in the second direction.

First claim

What is claimed is:

1. A display apparatus comprising a display area and a peripheral area outside the display area, the display area comprising a first display area and a second display area, the display apparatus comprising:
a first display element in a first row and a first column in the second display area;
a second display element in the first row and a second column in the second display area;
a first pixel circuit in the peripheral area and connected to the first display element;
a second pixel circuit in the peripheral area and connected to the second display element;
a first gate line in the peripheral area and connected to the first pixel circuit;
a second gate line in the peripheral area and connected to the second pixel circuit; and
a gate connection wiring connected to the first gate line and the second gate line.

2. The display apparatus of claim 1 , wherein the gate connection wiring comprises a first gate connection wiring and a second gate connection wiring,
the second gate connection wiring comprises a first connection wiring and a second connection wiring,
the first connection wiring is connected to the first gate connection wiring and the first gate line, and
the second connection wiring is connected to the first gate connection wiring and the second gate line.

3. The display apparatus of claim 2 , wherein the first gate connection wiring and the second gate connection wiring are located at different layers.

4. The display apparatus of claim 1 , further comprising an electrode connection wiring connected to the first pixel circuit and the first display element.

5. The display apparatus of claim 4 , wherein the electrode connection wiring comprises a first electrode connection wiring and a second electrode connection wiring.

6. The display apparatus of claim 5 , wherein the first electrode connection wiring is in the peripheral area and the second electrode connection wiring is in the second display area.

7. The display apparatus of claim 6 , wherein the first electrode connection wiring and the second electrode connection wiring include different materials from each other.

8. The display apparatus of claim 7 , wherein the second electrode connection wiring comprises transparent conducting oxide.

9. The display apparatus of claim 6 , wherein the first electrode connection wiring and the second electrode connection wiring are located at different layers.

10. The display apparatus of claim 6 , wherein the first electrode connection wiring and the second electrode connection wiring are located at a same layer as each other, and
wherein an end of the second electrode connection wiring covers an end of the first electrode connection wiring.

11. The display apparatus of claim 1 , further comprising a component disposed to correspond to the second display area.

12. The display apparatus of claim 1 , wherein a resolution of the first display area is higher than a resolution of the second display area.

13. The display apparatus of claim 1 , further comprising:
a first data line in the peripheral area and connected to the first pixel circuit; and
a second data line in the peripheral area and connected to the second pixel circuit.

14. The display apparatus of claim 13 , further comprising:
a third display element in the first display area;
a third pixel circuit in the first display area and connected to the third display element; and
a third data line in the first display area and connected to the third pixel circuit.

15. The display apparatus of claim 14 , further comprising a data connection wiring in the peripheral area and connected to the first data line and the third data line.

Assignees

• Samsung Display Co Ltd

Inventors

• Jung Sunyoung
• Kim Gunhee
• Kim Hyunho
• Shim Donghwan
• Yang Taehoon
• JANG Sanghee
• Choi Chungsock

Classifications

• G09G2300/0861

  with additional control of the display period without amending the charge stored in a pixel memory, e.g. by means of additional select electrodes · CPC title

• G09G2300/0842

  forming a memory circuit, e.g. a dynamic memory with one capacitor · CPC title

• G09G2300/0819

  used for counteracting undesired variations, e.g. feedback or autozeroing · CPC title

• G09G2300/0426

  Layout of electrodes and connections · CPC title

• H10K59/40 Primary

  OLEDs integrated with touch screens · CPC title