Semiconductor device and method for manufacturing the same

US12439675B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-12439675-B2
Application numberUS-202217809777-A
CountryUS
Kind codeB2
Filing dateJun 29, 2022
Priority dateDec 17, 2021
Publication dateOct 7, 2025
Grant dateOct 7, 2025

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  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

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Abstract

Official abstract text for this publication.

According to one embodiment, a semiconductor device includes first to third electrodes, a semiconductor member, a first conductive member, a connecting member, a first member, and an insulating member. The semiconductor member includes first to third semiconductor regions. The first semiconductor region is between the first electrode and the third semiconductor region. The first semiconductor region includes first to third partial regions. The second semiconductor region is between the first and third semiconductor regions. The second semiconductor region includes third and fourth semiconductor portions. The third semiconductor region includes first and second semiconductor portions. The second electrode is electrically connected with the third semiconductor region. The third electrode includes a first electrode portion. The first conductive member includes first to third conductive regions. The connecting member is electrically connected with the first conductive member. The first member is provided between the first electrode portion and the connecting member.

First claim

Opening claim text (preview).

What is claimed is: 1. A semiconductor device, comprising: a first electrode; a semiconductor member, the semiconductor member including a first semiconductor region of a first conductivity type, a second semiconductor region of a second conductivity type, and a third semiconductor region of the first conductivity type, the first semiconductor region being between the first electrode and the third semiconductor region, the first semiconductor region including a first partial region, a second partial region, and a third partial region, the second semiconductor region being between the first semiconductor region and the third semiconductor region, the third semiconductor region including a first semiconductor portion and a second semiconductor portion, a second direction from the first semiconductor portion to the second semiconductor portion crossing a first direction from the first electrode to the third semiconductor region, the second semiconductor region including a third semiconductor portion and a fourth semiconductor portion, a direction from the third semiconductor portion to the fourth semiconductor portion being along the second direction, the third semiconductor portion being between the first partial region and the first semiconductor portion in the first direction, the fourth semiconductor portion being between the second partial region and the second semiconductor portion in the first direction, a position of the third partial region in the second direction being between a position of the first partial region in the second direction and a position of the second partial region in the second direction; a second electrode electrically connected with the third semiconductor region; a third electrode including a first electrode portion, the first electrode portion being between the first semiconductor portion and the second semiconductor portion, and between the third semiconductor portion and the fourth semiconductor portion in the second direction; a first conductive member including a first conductive region, a second conductive region, and a third conductive region, the first conductive region being between the first partial region and the second partial region in the second direction, a position of the first conductive region in the first direction being between a position of the third partial region in the first direction and a position of the first electrode portion in the first direction, the second conductive region being between the first conductive region and the third conductive region in a third direction crossing a plane including the first direction and the second direction; a connecting member electrically connected with the first conductive member, a direction from the third conductive region to the connecting member being along the first direction; a first member provided between the first electrode portion and the connecting member in the third direction, a position of the second conductive region in the first direction being between a position of the third partial region in the first direction and a position of the first member in the first direction, the first member including an element different from an element included in the second conductive region; and an insulating member provided between the semiconductor member and the third electrode, between the semiconductor member and the first conductive member, and between the first conductive member and the first member. 2. The device according to claim 1 , wherein the second conductive region includes a first element, the first member includes the first element and a second element, the first element includes one of a third element and a fourth element, the second element includes other one of the third element and the fourth element, the third element includes at least one selected from the group consisting of phosphorus, arsenic and antimony, and the fourth element includes at least one selected from the group consisting of boron, aluminum and gallium. 3. The device according to claim 2 , wherein the second conductive region and the first member include silicon. 4. The device according to claim 1 , wherein the second conductive region includes phosphorus, and the first member includes phosphorus and boron. 5. The device according to claim 1 , wherein conductivity of the second conductive region is higher than conductivity of the first member. 6. The device according to claim 1 , wherein the insulating member includes a first insulating region provided between the first semiconductor portion and the first electrode portion, and between the third semiconductor portion and the first electrode portion, a second insulating region provided between the first electrode portion and the second semiconductor portion, and between the first electrode portion and the fourth semiconductor portion, and a third insulating region provided between the first conductive member and the first electrode portion. 7. The device according to claim 1 , wherein the third electrode further include a second electrode portion, the second electrode portion is between the first electrode portion and the second semiconductor portion, and between the first electrode portion and the fourth semiconductor portion in the second direction, and a part of the insulating member is between the first electrode portion and the second electrode portion. 8. The device according to claim 7 , further comprising: a second member, the second member being provided between the second electrode portion and the connecting member in the third direction, the second member including an element different from the element included in the second conductive region, and a part of the insulating member being provided between the second conductive region and the second member. 9. The device according to claim 7 , wherein the insulating member includes a first insulating region provided between the first semiconductor portion and the first electrode portion, and between the third semiconductor portion and the first electrode portion, a second insulating region provided between the second electrode portion and the second semiconductor portion, and between the second electrode portion and the fourth semiconductor portion, a third insulating region provided between the first conductive member and the first electrode portion, and between the first conductive member and the second electrode portion, and a fourth insulating region provided between the first electrode portion and the second electrode portion. 10. The device according to claim 7 , wherein a position of the first conductive region in the second direction is between a position of the first electrode portion in the second direction and a position of the second electrode portion in the second direction. 11. The device according to claim 7 , wherein a part of the first conductive region overlaps a part of the insulating member in the first direction, and an other part of the first conductive region overlaps the first electrode portion and the second electrode portion in the first direction. 12. The device according to claim 7 , further comprising: a second conductive member; and a second member, the second conductive member including a fourth conductive region, a fifth conductive region, and a sixth conductive region, the fourth conductive region being between the first conductive region and the second partial region in the second direction, a position of the fourth conductive region in the first direction being between a position of the third partial region in the first direction and a position of the second electrode portion in the

Assignees

Inventors

Classifications

  • of electrodes ohmically coupled to a semiconductor · CPC title

  • Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes · CPC title

  • characterised by the conducting layers · CPC title

  • Vertical DMOS [VDMOS] FETs · CPC title

  • using recessing of the gate electrodes, e.g. to form trench gate electrodes · CPC title

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Frequently asked questions

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What does patent US12439675B2 cover?
According to one embodiment, a semiconductor device includes first to third electrodes, a semiconductor member, a first conductive member, a connecting member, a first member, and an insulating member. The semiconductor member includes first to third semiconductor regions. The first semiconductor region is between the first electrode and the third semiconductor region. The first semiconductor r…
Who is the assignee on this patent?
Toshiba Kk, Toshiba Electronic Devices & Storage Corp
What technology area does this patent fall under?
Primary CPC classification H10D64/513. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Oct 07 2025 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 9 related publications on this page (citations in our corpus or others sharing the same primary CPC).