Method for reduction of DC link busbar and capacitor current, by adjustment of a PWM carrier delay

Patent metadata

Field	Value
Publication number	US-12438435-B2
Application number	US-202118247732-A
Country	US
Kind code	B2
Filing date	Sep 30, 2021
Priority date	Oct 1, 2020
Publication date	Oct 7, 2025
Grant date	Oct 7, 2025

Abstract

The present invention relates a method for optimizing electrical current in a DC link busbar of a power converter system, wherein the power converter system comprises, a first inverter bridge, connected to the DC link busbar at a first end, the first inverter bridge having a first pulse width modulation signal, and a second inverter bridge, connected to the DC link busbar at a second end, the second inverter bridge having a second pulse width modulation signal, measuring a current flowing in the DC link busbar from the first end to the second end, optimizing the current flowing in the DC link busbar by delaying the first pulse width modulation signal and the second pulse width modulation signal from each other with a carrier delay, the invention also relates to power converter and wind turbine with optimizing electrical current in a DC link busbar.

First claim

The invention claimed is:

1. A method for optimizing electrical current in a DC link busbar of a power converter system comprising:
a first inverter bridge, connected to the DC link busbar at a first end, the first inverter bridge having a first pulse width modulation signal, and
a second inverter bridge, connected to the DC link busbar at a second end, the second inverter bridge having a second pulse width modulation signal; and wherein the method comprises:
measuring a current flowing in the DC link busbar from the first end to the second end,
optimizing the current flowing in the DC link busbar by delaying the first pulse width modulation signal and the second pulse width modulation signal from each other with a carrier delay; wherein optimizing the current comprises:
minimizing power losses in the DC link busbar by deriving a model of a frequency dependent impedance of one or more conductors of the DC link busbar;
deriving at least one harmonic of the current flowing in the one or more conductors of the DC link busbar; and
calculating power losses in the DC link busbar based on the at least one harmonic and the model of the frequency dependent impedance of the one or more conductors of the DC link busbar.

2. The method of claim 1 , wherein optimizing the current comprises minimizing a measured RMS current in the DC link busbar.

3. The method of claim 1 , wherein optimizing the current further comprises,
filtering the current in a high pass filter to generate a filtered current, wherein the optimization is based on the filtered current.

4. The method of claim 1 , wherein deriving at least one harmonic comprises:
components around a first harmonic of a switching frequency and
components around a second harmonic of the switching frequency.

5. The method of claim 1 further comprises,
periodically recording data sets with carrier delay as a function of active power, reactive power and measured current,
operating the power converter system with a carrier delay based on look up tables in the data sets.

6. The method of claim 5 further comprises, wherein periodically recording data sets occurs with a fixed interval, such as once a day, once a week or once a month, and the carrier delay is updated with the same intervals.

7. The method of claim 5 further comprises, wherein periodically recording data sets occurs based on predefined events, and the carrier delay is updated as a consequence of the predefined events.

8. The method of claim 1 further comprising,
a first carrier frequency of the first pulse width modulation signal and
a second carrier frequency of the first pulse width modulation signal,
wherein the first carrier frequency and the second carrier frequency are the same, or an integer multiply of one of the other.

9. The method of claim 1 further comprising,
a first carrier frequency of the first pulse width modulation signal and
a second carrier frequency of the first pulse width modulation signal,
wherein the first carrier frequency and the second carrier frequency are different and a non integer multiply of one of the other.

10. The method of claim 1 , wherein the power converter system is a wind turbine.

11. A power converter system with optimized current flow in a DC link busbar, wherein the power converter system comprises,
a first inverter bridge, connected to the DC link busbar at a first end, the first inverter bridge arranged with a first pulse width modulation signal;
a second inverter bridge, connected to the DC link busbar at a second end, the second inverter bridge arranged with a second pulse width modulation signal;
a sensor arranged to measure a current flowing in the DC link busbar from the first end to the second end; and
a controller arranged to optimize the current flowing in the DC link busbar by delaying the first pulse width modulation signal and the second pulse width modulation signal from each other with a carrier delay, wherein the controller is further arranged to optimize the current flow by:
minimizing power losses in the DC link busbar by deriving a model of a frequency dependent impedance of one or more conductors of the DC link busbar;
deriving at least one harmonic of the current flowing in the one or more conductors of the DC link busbar; and
calculating power losses in the DC link busbar based on the at least one harmonic and the model of the frequency dependent impedance of the one or more conductors of the DC link busbar.

12. A wind turbine, comprising:
a tower;
a nacelle disposed on the tower;
a rotor extending from the nacelle and having a plurality of blades disposed on a distal end thereof;
a power converter with optimized current flow in a DC link busbar, wherein the power converter comprises:
a first inverter bridge, connected to the DC link busbar at a first end, the first inverter bridge arranged with a first pulse width modulation signal;
a second inverter bridge, connected to the DC link busbar at a second end, the second inverter bridge arranged with a second pulse width modulation signal;
a sensor arranged to measure a current flowing in the DC link busbar from the first end to the second end; and
a controller arranged to optimize the current flowing in the DC link busbar by delaying the first pulse width modulation signal and the second pulse width modulation signal from each other with a carrier delay, wherein the controller is further arranged to optimize current flow by:
minimizing power losses in the DC link busbar by deriving a model of a frequency dependent impedance of one or more conductors of the DC link busbar;
deriving at least one harmonic of the current flowing in the one or more conductors of the DC link busbar; and
calculating power losses in the DC link busbar based on the at least one harmonic and the model of the frequency dependent impedance of the one or more conductors of the DC link busbar.

Assignees

• Vestas Wind Sys As

Inventors

• Andersen Thomas Lundgren
• Lindholm Morten

Classifications

• H02M5/458

  using semiconductor devices only · CPC title

• H02M1/12

  Arrangements for reducing harmonics from AC input or output · CPC title

• F03D13/201

  Towers · CPC title

• H02M1/0009 Primary

  Devices or circuits for detecting current in a converter · CPC title

• H02M1/0043

  Converters switched with a phase shift, i.e. interleaved (non-isolated DC/DC converters H02M3/1586) · CPC title