Displays with Supplemental Loading Structures
US-2019073976-A1 · Mar 7, 2019 · US
US12433143B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-12433143-B2 |
| Application number | US-202318539195-A |
| Country | US |
| Kind code | B2 |
| Filing date | Dec 13, 2023 |
| Priority date | Nov 30, 2018 |
| Publication date | Sep 30, 2025 |
| Grant date | Sep 30, 2025 |
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A display panel may include a substrate, pixels, dummy pixels, and voltage lines. The substrate may include a first transmission region for light transmission and/or sound transmission, a non-display area surrounding the first transmission region, and a display area surrounding the non-display area. The pixels may be arranged on the display area and may emit light. The dummy pixels may be arranged on the non-display area, may include a first dummy pixel, and may emit no light. The voltage lines may transmit voltages to the pixels and the dummy pixels. The voltage lines may include a first voltage line and a second voltage line. The first voltage line may be spaced from the second voltage line, may be aligned with the second voltage line, and may overlap the first dummy pixel. The first transmission region may be positioned between the first voltage line and the second voltage line.
Opening claim text (preview).
What is claimed is: 1. A display panel comprising: a substrate including a first transmission region, a non-display area that surrounds the first transmission region, and a display area that surrounds the non-display area; emitting pixel arranged on the display area and including a pixel circuit and a display element, the pixel circuit comprising at least one transistor, the display element being electrically connected to the pixel circuit; dummy pixel arranged on the non-display area and including a dummy pixel circuit comprising at least one dummy transistor; driving voltage lines configured to transmit driving voltages to the pixel circuit and the dummy pixel circuit; a pixel defining layer arranged on the pixel circuit and the dummy pixel circuit, wherein the pixel defining layer comprises an opening corresponding to the emitting pixel and has a flat surface overlapping the dummy pixel, wherein the driving voltage lines include a first driving voltage line, a second driving voltage line, and a third driving voltage line, wherein the first driving voltage line and the second driving voltage line intersect a boundary of the non-display area once, and wherein the third driving voltage line intersects the boundary of the non-display area at least twice. 2. The display panel of claim 1 , wherein the display element comprises a pixel electrode electrically connected to the pixel circuit, and the dummy pixel includes a dummy conductive layer disposed on a same layer as the pixel electrode. 3. The display panel of claim 2 , wherein the dummy conductive layer overlapped with the dummy pixel circuit but is not electrically connected to any conductive layer. 4. The display panel of claim 1 , wherein a structure of the pixel circuit is the same as a structure of the dummy pixel circuit. 5. The display panel of claim 1 , further comprising an organic emission layer, wherein a first portion of the organic emission layer is arranged within the opening of the pixel defining layer, and wherein a second portion of the organic emission layer overlaps the dummy pixel and is positioned farther from the substrate than the first portion of the organic emission layer. 6. The display panel of claim 1 , further comprising a first common layer, an organic emission layer, and a second common layer sequentially stacked on each other, wherein a first portion of the first common layer, a first portion of the organic emission layer, and a first portion of the second common layer are arranged within the opening of the pixel defining layer, and wherein a second portion of the first common layer and a second portion of the second common layer each overlap the dummy pixel and are positioned farther from the substrate than the first portion of the first common layer and the first portion of the second common layer, respectively. 7. The display panel of claim 1 , wherein the display element comprises a pixel electrode connected to the pixel circuit, an intermediate layer arranged within the opening of the pixel defining layer, and an opposite electrode arranged on the intermediate layer, wherein the opposite electrode overlaps the emitting pixel and the dummy pixel. 8. The display panel of claim 7 , wherein a first portion of the opposite electrode overlaps the pixel electrode, and wherein a second portion of the opposite electrode overlaps the dummy pixel and is positioned farther from the substrate than the first portion of the opposite electrode. 9. The display panel of claim 7 , further comprising a capping layer disposed on the opposite electrode, wherein the capping layer overlaps the emitting pixel and the dummy pixel. 10. The display panel of claim 1 , wherein the dummy pixel circuit comprises a driving thin-film transistor and a storage capacitor that overlaps the driving thin-film transistor. 11. A display device comprising: a substrate including a first transmission region, a non-display area that surrounds the first transmission region, and a display area that surrounds the non-display area; an electronic element under the first transmission region of the substrate; emitting pixel arranged on the display area and including a pixel circuit and a display element, the pixel circuit comprising at least one transistor, the display element being electrically connected to the pixel circuit; dummy pixel arranged on the non-display area and including a dummy pixel circuit comprising at least one dummy transistor; driving voltage lines configured to transmit driving voltages to the pixel circuit and the dummy pixel circuit; a pixel defining layer arranged on the pixel circuit and the dummy pixel circuit, wherein the pixel defining layer comprises an opening corresponding to the emitting pixel and has a flat surface overlapping the dummy pixel, wherein the driving voltage lines include a first driving voltage line, a second driving voltage line, and a third driving voltage line, wherein the first driving voltage line and the second driving voltage line intersect a boundary of the non-display area once, and wherein the third driving voltage line intersects the boundary of the non-display area at least twice. 12. The display device of claim 11 , wherein the display element comprises a pixel electrode electrically connected to the pixel circuit, and the dummy pixel includes a dummy conductive layer disposed on a same layer as the pixel electrode. 13. The display device of claim 12 , wherein the dummy conductive layer overlapped with the dummy pixel circuit but is not electrically connected to any conductive layer. 14. The display device of claim 11 , wherein a structure of the pixel circuit is same as a structure of the dummy pixel circuit. 15. The display device of claim 11 , further comprising an organic emission layer, wherein a first portion of the organic emission layer is arranged within the opening of the pixel defining layer, and wherein a second portion of the organic emission layer overlaps the dummy pixel and is positioned farther from the substrate than the first portion of the organic emission layer. 16. The display device of claim 11 , further comprising a first common layer, an organic emission layer, and a second common layer sequentially stacked on each other, wherein a first portion of the first common layer, a first portion of the organic emission layer, and a first portion of the second common layer are arranged within the opening of the pixel defining layer, and wherein a second portion of the first common layer and a second portion of the second common layer each overlap the dummy pixel and are positioned farther from the substrate than the first portion of the first common layer and the first portion of the second common layer, respectively. 17. The display device of claim 11 , wherein the display element comprises a pixel electrode connected to the pixel circuit, an intermediate layer arranged within the opening of the pixel defining layer, and an opposite electrode arranged on the intermediate layer, wherein the opposite electrode overlaps the emitting pixel and the dummy pixel. 18. The display device of claim 11 , wherein the substrate further comprises a second transmission region spaced apart from the first transmission region, and the non-display area that surrounds the first transmission region and the second transmission region. 19. The display device of claim 18 , wherein the dummy pixel disposed between the first transmission region and the second transmission region. 20. The
the pixel elements being capacitors · CPC title
the pixel elements being TFTs · CPC title
Interconnections, e.g. wiring lines or terminals · CPC title
Pixel-defining structures or layers, e.g. banks · CPC title
with pixel circuitry controlling the current through the light-emitting element · CPC title
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