Display substrate and display apparatus

Patent metadata

Field	Value
Publication number	US-12433119-B2
Application number	US-202117605664-A
Country	US
Kind code	B2
Filing date	Jun 8, 2021
Priority date	Jan 4, 2021
Publication date	Sep 30, 2025
Grant date	Sep 30, 2025

Abstract

A display substrate and a display apparatus are provided. The display substrate includes a first conductive structure including a first surface and a third surface that are opposite and a second surface and a fourth surface that are opposite. The first surface and the second surface respectively have different angles with a plate surface of the base substrate. The first surface and the second surface are respectively provided with a first surface microstructure and a second surface microstructure; the first cross section has a first orthogonal projection on the third surface, and a length of the first orthogonal projection is less than a length of the first surface microstructure in the first cross section; the second cross section has a second orthogonal projection on the fourth surface, and a length of the second orthogonal projection is less than a length of the second surface microstructure in the second cross section.

First claim

What is claimed is:

1. A display substrate, comprising a base substrate and a first conductive structure on the base substrate,
wherein the first conductive structure comprises a first surface and a second surface away from the base substrate, and the first surface and the second surface are made of a same material;
the first surface has a first included angle with a plate surface of the base substrate, the second surface has a second included angle with the plate surface of the base substrate, and the first included angle is different from the second included angle;
the first surface is provided with a first surface microstructure, and the second surface is provided with a second surface microstructure;
the first conductive structure further comprises a third surface and a fourth surface close to the base substrate, the third surface is opposite to the first surface, and the fourth surface is opposite to the second surface;
the first surface microstructure has a first cross section perpendicular to the base substrate, the first cross section has a first orthogonal projection on the third surface, and a length of the first orthogonal projection is less than a length of the first surface microstructure in the first cross section; and
the second surface microstructure has a second cross section perpendicular to the base substrate, the second cross section has a second orthogonal projection on the fourth surface, and a length of the second orthogonal projection is less than a length of the second surface microstructure in the second cross section.

2. The display substrate according to claim 1 , wherein in a direction perpendicular to the base substrate, the first surface microstructure at least partially overlaps with the third surface, and the second surface microstructure at least partially overlaps with the fourth surface;
at least one of the third surface and the fourth surface is a flat surface.

3. The display substrate according to claim 1 , wherein an area of the orthogonal projection of the first surface microstructure on the third surface is less than a surface area of the first surface microstructure; and
an area of the orthogonal projection of the second surface microstructure on the fourth surface is less than a surface area of the second surface microstructure.

4. The display substrate according to claim 1 , wherein a minimum thickness of the first conductive structure at the first surface microstructure is less than an average thickness of the first conductive structure and greater than ⅗ of the average thickness of the first conductive structure.

5. The display substrate according to claim 1 , wherein the first surface microstructure has a first end point, a first intermediate point and a second end point in the first cross section; and the second surface microstructure has a third end point, a second intermediate point, and a fourth end point in the second cross section;
a distance between the first intermediate point and the third surface is equal to neither a distance between the first end point and the third surface nor a distance between the second end point and the third surface;
a distance between the second intermediate point and the fourth surface is equal to neither a distance between the third end point and the fourth surface, nor a distance between the fourth end point and the fourth surface.

6. The display substrate according to claim 1 , wherein the first included angle is greater than 0 degrees; and the second included angle is equal to 0 degrees.

7. The display substrate according to claim 6 , further comprising a first insulating layer on a side of the first conductive structure close to the base substrate,
wherein the first insulating layer comprises a first portion in direct contact with the third surface of the first conductive structure and a second portion in direct contact with the fourth surface of the first conductive structure; and
a minimum thickness of the first portion is less than a minimum thickness of the second portion.

8. The display substrate according to claim 7 , further comprising a second conductive structure on a side of the first insulating layer close to the base substrate, wherein in a direction perpendicular to the base substrate, the first surface microstructure and the second conductive structure are not overlapped with each other; and
the first conductive structure is electrically connected with the second conductive structure through a first via hole running through the first insulating layer;
in a direction perpendicular to the base substrate, the first surface microstructure is at least partially overlapped with the first via hole.

9. The display substrate according to claim 8 , wherein the first insulating layer comprises a first sub-layer and a second sub-layer that are stacked, and the second sub-layer is farther away from the base substrate than the first sub-layer; and
the first sub-layer comprises a first side surface exposed by the first via hole, the second sub-layer comprises a second side surface exposed by the first via hole, and at least one of the first side surface and the second side surface is in direct contact with the third surface of the first conductive structure.

10. The display substrate according to claim 9 , wherein an included angle between the first side surface and the base substrate is greater than an included angle between the second side surface and the base substrate.

11. The display substrate according to claim 1 , wherein the first surface microstructure has a first end point and a second end point in the first cross section; and the second surface microstructure has a third end point and a fourth end point in the second cross section;
a distance from a midpoint of a line segment between the first end point and the second end point to the plate surface of the base substrate is different from a distance from a midpoint of a line segment between the third end point and the fourth end point to the plate surface of the base substrate; and
a distance between the first end point and the second end point is greater than a distance between the third end point and the fourth end point.

12. The display substrate according to claim 1 wherein the first surface microstructure has a first end point and a second end point in the first cross section; and distances from a point of the first cross section that is closest to the third surface to the first end point and the second end point are unequal.

13. The display substrate according to claim 1 , wherein the first surface microstructure comprises a first concave structure, and the second surface microstructure comprises a second concave structure.

14. The display substrate according to claim 1 , further comprising a plurality of sub-pixels on the base substrate,
wherein the plurality of sub-pixels are arranged as a plurality of pixel columns and a plurality of pixel rows along a first direction and a second direction, the first direction intersecting with the second direction;
each of the plurality of sub-pixels comprises a first transistor, a second transistor, a third transistor, and a storage capacitor on the base substrate;
a first electrode of the second transistor is electrically connected with a first capacitor electrode of the storage capacitor and a gate electrode of the first transistor, a second electrode of the second transistor is configured to receive a data signal, a gate electrode of the second transistor is configured to receive a first control signal, and the second transistor is configured to write the data signal into the gate electrode of the first transistor and the sto

Assignees

• Beijing Boe Technology Dev Co Ltd
• Boe Technology Group Co Ltd

Inventors

• Zhang Dacheng
• Xu Chen

Classifications

• H10K59/1216

  the pixel elements being capacitors · CPC title

• H10K59/38

  comprising colour filters or colour changing media [CCM] · CPC title

• H10K59/1213 Primary

  the pixel elements being TFTs · CPC title

• H10K2102/351

  Thickness · CPC title

• H10K59/351

  comprising more than three subpixels, e.g. red-green-blue-white [RGBW] · CPC title