Display substrate having spacing groove and manufacturing method therefor, and display device having spacing groove

US12433111B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-12433111-B2
Application numberUS-202117763212-A
CountryUS
Kind codeB2
Filing dateMay 14, 2021
Priority dateJun 19, 2020
Publication dateSep 30, 2025
Grant dateSep 30, 2025

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A display substrate, comprising: a plurality of first electrodes having a planar middle part which are located on a planarization layer of a driving backplane, a spacing groove exposing a planar surface of the planarization layer being provided between two adjacent first electrodes; an electric leakage blocking layer located on a first electrode layer and located between two adjacent first electrodes, the electric leakage blocking layer being provided with a blocking groove corresponding to the spacing groove and exposing the planar surface of the planarization layer, and the electric leakage blocking layer being overlapped on the surface of the middle part on at least one side; and a light-emitting functional layer located at the side of the electric leakage blocking layer and the first electrode layer away from the driving backplane.

First claim

Opening claim text (preview).

The invention claimed is: 1. A display substrate, comprising: a driving backplane comprising a driving structure layer and a planarization layer overlaying the driving structure layer, wherein the planarization layer is an inorganic layer, a via hole is provided in the planarization layer, and the planarization layer has a flat surface in a position outside the via hole; a first electrode layer located at one side of the planarization layer away from the driving structure layer, wherein the first electrode layer comprises a plurality of first electrodes distributed in an array, there is a spacing groove, which exposes the flat surface of the planarization layer, between two adjacent first electrodes, a first electrode of the plurality of first electrodes comprises a flat middle portion, and the first electrode is electrically connected to the driving structure layer through a conductive metal in the via hole; an electric leakage cutoff layer located at one side of the first electrode layer away from the driving backplane, wherein the electric leakage cutoff layer is located between two adjacent first electrodes, a cutoff groove corresponding to the spacing groove and exposing the flat surface of the planarization layer is provided in the electric leakage cutoff layer, a depth of the cutoff groove is greater than or equal to a thickness of the middle portion, and the electric leakage cutoff layer laps over a surface of at least one side of the middle portion away from the driving backplane; a light-emitting functional layer located at one side of the electric leakage cutoff layer and the first electrode layer away from the driving backplane; and a second electrode layer located at one side of the light-emitting functional layer away from the driving backplane; wherein the first electrode further comprises a climbing portion surrounding the middle portion; the second electrode layer comprises a plurality of gentle portions corresponding to the middle portions and connecting portions located between two adjacent gentle portions; a thickness of the light-emitting functional layer located between a gentle portion of the plurality of gentle portions and the middle portion is do in a direction perpendicular to the driving backplane; a minimum value of a sum of a thickness of the electric leakage cutoff layer lapping over the middle portion and the thickness of the middle portion is d1; and a ratio of dl to do is 0.3 to 1. 2. The display substrate according to claim 1 , wherein the electric leakage cutoff layer located at both sides of the cutoff groove laps over a surface of one side of a corresponding middle portion away from the driving backplane, and the electric leakage cutoff layer overlies a side surface of the first electrode facing the spacing groove. 3. The display substrate according to claim 1 , wherein a ratio of the thickness of the middle portion to the thickness of the electric leakage cutoff layer lapping over the middle portion is 2 to 4 in the direction perpendicular to the driving backplane. 4. The display substrate according to claim 3 , wherein the thickness of the middle portion is 1000 angstroms to 1800 angstroms, and the thickness of the electric leakage cutoff layer lapping over the surface of the middle portion is 300 angstroms to 800 angstroms. 5. The display substrate according to claim 1 , wherein a ratio of the thickness of the middle portion to a thickness of the gentle portion of the second electrode layer is 7 to 13 in the direction perpendicular to the driving backplane. 6. The display substrate according to claim 1 , wherein the first electrode comprises a composite conductive layer located on a surface of the driving backplane and a protective conductive layer located at one side of the composite conductive layer away from the driving backplane, a periphery of the protective conductive layer is in contact with the surface of the driving backplane, a material of the protective conductive layer comprises at least one of indium tin oxide and indium zinc oxide, the composite conductive layer comprises a first conductive layer and a second conductive layer which are sequentially stacked from the driving backplane towards the light-emitting functional layer, a material of the first conductive layer comprises titanium, and a material of the second conductive layer comprises at least one of silver and aluminum. 7. The display substrate according to claim 1 , wherein the first electrode comprises a composite conductive layer located on a surface of the driving backplane and a protective conductive layer located at one side of the composite conductive layer away from the driving backplane, a periphery of the protective conductive layer is in contact with the surface of the driving backplane, and a material of the protective conductive layer comprises at least one of indium tin oxide and indium zinc oxide, the composite conductive layer comprises a first conductive layer, a second conductive layer and a third conductive layer which are sequentially stacked from the driving backplane towards the light-emitting functional layer, a material of the first conductive layer comprises titanium, a material of the second conductive layer comprises at least one of silver and aluminum, and a material of the third conductive layer comprises titanium. 8. The display substrate according to claim 1 , wherein a width of a lap-over area between the electric leakage cutoff layer and the middle portion is 0.05 μm to 0.3 μm in a plane parallel to the driving backplane, the width of the lap-over area being a dimension of the lap-over area in a direction perpendicular to an extension direction of the electric leakage cutoff layer. 9. The display substrate according to claim 1 , wherein a width of the cutoff groove is 0.3 μm to 1.5 μm, the width of the cutoff groove being a dimension of the cutoff groove in a direction perpendicular to an extension direction of the cutoff groove. 10. The display substrate according to claim 1 , wherein the electric leakage cutoff layer located at both sides of the cutoff groove overlies a surface of one side of a corresponding first electrode facing the cutoff groove. 11. The display substrate according to claim 1 , wherein a slope angle of a side wall of the cutoff groove is 60° to 120°, the slope angle of the side wall of the cutoff groove being an angle between the side wall of the cutoff groove and a bottom wall of the cutoff groove. 12. The display substrate according to claim 11 , wherein a slope angle of the climbing portion is 70° to 90°, the slope angle of the climbing portion being an angle between the climbing portion and the bottom wall of the spacing groove. 13. The display substrate according to claim 1 , wherein the light-emitting functional layer comprises a hole injection layer, a hole transport layer, a first light-emitting layer, a second light-emitting layer, an intermediate layer, a third light-emitting layer, a hole blocking layer, an electron transport layer and an electron injection layer stacked from the first electrode towards one side of the second electrode layer, and a thickness of the hole injection layer is 70 angstroms to 130 angstroms. 14. The display substrate according to claim 13 , wherein the first light-emitting layer is a red light emitting layer, the second light-emitting layer is a green light emitting layer and the third light-emitting layer is a blue light emitting layer. 15. A display apparatus, comprising the display substrate according to claim 1 . 16. A method for manufacturing a display substrate, comprisi

Assignees

Inventors

Classifications

  • Manufacture or treatment · CPC title

  • Pixel-defining structures or layers, e.g. banks · CPC title

  • comprising red-green-blue [RGB] subpixels · CPC title

  • H10K71/00Primary

    Manufacture or treatment specially adapted for the organic devices covered by this subclass · CPC title

  • characterised by the geometrical arrangement of the RGB subpixels · CPC title

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What does patent US12433111B2 cover?
A display substrate, comprising: a plurality of first electrodes having a planar middle part which are located on a planarization layer of a driving backplane, a spacing groove exposing a planar surface of the planarization layer being provided between two adjacent first electrodes; an electric leakage blocking layer located on a first electrode layer and located between two adjacent first elec…
Who is the assignee on this patent?
Boe Technology Group Co Ltd
What technology area does this patent fall under?
Primary CPC classification H10K71/00. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Sep 30 2025 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 11 related publications on this page (citations in our corpus or others sharing the same primary CPC).