Image signal detection circuit, control method and motion detection method

Patent metadata

Field	Value
Publication number	US-12432471-B2
Application number	US-202118270254-A
Country	US
Kind code	B2
Filing date	Dec 24, 2021
Priority date	Dec 30, 2020
Publication date	Sep 30, 2025
Grant date	Sep 30, 2025

Abstract

The present invention is to provide an image signal detection circuit, a control method, and a motion detection method. The image signal detection circuit comprises at least one acquisition module, the acquisition module comprises at least one acquisition sub-module, the acquisition sub-module comprises a capacitor to acquire the difference between a pair of two consecutive frames of pixel signals by taking a reference voltage as a reference. The image signal detection circuit and a motion detection circuit are structurally simple and easy to implement. It can realize motion detection at increased difference detection speed without analog-to-digital conversion.

First claim

What is claimed is:

1. An image signal detection circuit, comprising at least one acquisition module, each of which comprising at least one acquisition sub-module; wherein the acquisition sub-module comprises a first switch, a second switch and a capacitor;
one end of the first switch is set as an input end of the acquisition sub-module and is connected to a pixel signal source, the other end of the first switch is connected to a first end of the capacitor;
a second end of the capacitor is set as an output end of the acquisition sub-module, and is connected to one end of the second switch;
the other end of the second switch is connected to a reference voltage source;
the image signal detection circuit further comprises at least one comparison module, each of which comprising a comparator, a logic unit, at least one third switch, a fourth switch and a fifth switch, wherein,
an output end of each of the acquisition sub-modules is connected to a first input end of the comparator, and the acquisition sub-modules are respectively connected to the comparator through different third switches;
a second input end of the comparator is connected to a lower limit voltage source through the fourth switch, and is also connected to an upper limit voltage source through the fifth switch;
the comparator is configured to output a first signal when a signal at the first input end is greater than a signal at the second input end, and output a second signal when the signal at the first input end is less than the signal at the second input end;
the logic unit is configured to receive the first signal or the second signal output by the comparator and output a signal according to preset logic.

2. The image signal detection circuit of claim 1 , wherein, the acquisition module comprises at least two acquisition sub-modules, and the acquisition sub-modules in the same acquisition module are connected to a same pixel signal source.

3. The image signal detection circuit of claim 1 , wherein, a voltage of the lower limit voltage source is equal to a voltage of the reference voltage source minus an allowable error voltage, and a voltage of the upper limit voltage source is equal to the voltage of the reference voltage source plus the allowable error voltage.

4. A motion detection circuit, wherein, the motion detection circuit comprises a camera module and the image signal detection circuit according to claim 1 , the camera module outputs an image signal stream of a captured region, an input end of the acquisition module is connected to an output source of a pixel signal stream in the image signal stream.

5. The image signal detection circuit of claim 1 , wherein, the preset logic comprises, outputting a first preset signal if a third signal is the same as a fourth signal; and
outputting a second preset signal or not outputting any signals if the third signal is different from the fourth signal;
wherein the third signal refers to a signal output by the comparator when the third switch and the fourth switch are closed simultaneously, the fourth signal refers to a signal output by the comparator when the third switch and the fifth switch are closed simultaneously.

6. The image signal detection circuit of claim 5 , wherein, when the fourth signal is predictable based on a received third signal, the logic unit is configured to use the predicted fourth signal as a received fourth signal and output the signal according to the preset logic, or when the third signal is predictable based on a received fourth signal, the logic unit is configured to use the predicted third signal as the received third signal and output the signal according to the preset logic.

7. A control method for controlling the image signal detection circuit according to claim 1 to detect two consecutive frames of pixel signals and output a detection result, the control method comprises:
during detecting a first frame signal by the acquisition sub-module, simultaneously closing the first switch and the second switch of the acquisition sub-module for a first closure duration greater than or equal to a first preset duration;
by the end of detecting the first frame signal by the acquisition sub-module, opening the first switch and the second switch of the acquisition sub-module;
during detecting a second frame signal by the acquisition sub-module, closing the first switch of the acquisition sub-module for a second closure duration greater than or equal to a second preset duration;
the first frame signal is a signal of a first frame of a pair of two consecutive frames of pixel signals received by the acquisition sub-module, and the second frame signal is a signal of a second frame of the pair of two consecutive frames of the pixel signals received by the acquisition sub-module.

8. The control method of claim 7 , further comprising:
during detecting the second frame signal by the acquisition sub-module, after closing the first switch of the acquisition sub-module for at least the second preset duration, closing the third switch corresponding to the acquisition sub-module;
by the end of detecting the second frame signal by the acquisition sub-module, opening the first switch and the third switch;
during the closure duration of any one of the third switches of the comparison module, closing the fourth switch or the fifth switch to drive the comparator to output the third signal or the fourth signal, and then opening the fourth switch or the fifth switch, closing the fifth switch or the fourth switch to drive the comparator to output the fourth signal or the third signal, and opening the fifth switch or the fourth switch.

9. The control method of claim 7 , wherein, different acquisition sub-modules of the same acquisition module detect different pairs of two consecutive frames to enable all the pairs of two consecutive frames of the pixel signals be detected by the acquisition module.

10. The control method of claim 9 , wherein,
one of the acquisition sub-modules of the acquisition module detects pairs of two consecutive frames whose first frame signals are odd-numbered frame signals, the other of the acquisition sub-modules of the acquisition module detects pairs of two consecutive frames whose first frame signals are even-numbered frame signals, the two acquisition sub-modules work alternately and continuously to detect all the pairs of two consecutive frames of the pixel signals.

Assignees

• Shanghai Ic R&D Ct Co Ltd
• Chengdu Image Design Tech Co Ltd

Inventors

• Zeng Xi
• He Xuehong

Classifications

• H04N5/144

  Movement detection (for video coding H04N19/503; analysis of motion in general G06T7/20) · CPC title

• H04N23/60

  Control of cameras or camera modules · CPC title

• H04N25/00

  Circuitry of solid-state image sensors [SSIS]; Control thereof · CPC title

• H04N25/707

  Pixels for event detection · CPC title

• H04N25/78

  Readout circuits for addressed sensors, e.g. output amplifiers or A/D converters · CPC title