Read sampler feedback technology

US12430838B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-12430838-B2
Application numberUS-202117518292-A
CountryUS
Kind codeB2
Filing dateNov 3, 2021
Priority dateNov 3, 2021
Publication dateSep 30, 2025
Grant dateSep 30, 2025

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  1. Title

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  2. Abstract

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

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Methods, systems and apparatuses may provide for technology that reads data from a sampler feedback resource based on coordinates relative to a paired texture that was used to generate the sampler feedback data.

First claim

Opening claim text (preview).

We claim: 1. A computing system comprising: a network controller; a processor coupled to the network controller; and a memory coupled to the processor, wherein the memory includes a set of application instructions, which when executed by the processor, cause the processor to: identify accessed texels in a texture based on coordinates of the accessed texels in a resource paired with the texture, and read mip region data in a feedback map based on the accessed texels to perform sampling operations with respect to the texture through an instruction that specifies the texture, a hardware sampler to read the mip region data, and the coordinates of the accessed texels. 2. The computing system of claim 1 , wherein the set of application instructions, when executed, further cause the processor to initiate a filter operation with respect to the mip region data. 3. The computing system of claim 2 , wherein the set of application instructions, when executed, further cause the processor to compensate, based on a result of the filter operation, for one or more texels that have not been generated. 4. The computing system of claim 2 , wherein to initiate the filter operation, the set of application instructions, when executed, cause the processor to send a request to the hardware sampler. 5. The computing system of claim 1 , wherein the resource is an image resource comprises one or more of cache, memory, register, and execution unit. 6. The computing system of claim 1 , wherein the coordinates have been normalized relative to a paired texture shader resource view. 7. The computing system of claim 1 , wherein the instruction further specifies a level of detail to read the mip region data. 8. A semiconductor apparatus comprising: one or more substrates; and logic coupled the one or more substrates, wherein the logic is implemented at least partly in one or more of configurable or fixed-functionality hardware, the logic to: identify accessed texels in a texture based on coordinates of the accessed texels in a resource paired with the texture; and read mip region data in a feedback map based on the accessed texels to perform sampling operations with respect to the texture through an instruction that specifies the texture, a hardware sampler to read the mip region data, and the coordinates of the accessed texels. 9. The semiconductor apparatus of claim 8 , wherein the logic is to conduct a filter operation with respect to the mip region data. 10. The semiconductor apparatus of claim 9 , wherein one or more texels that have not been generated are compensated for based on a result of the filter operation. 11. The semiconductor apparatus of claim 9 , wherein the logic includes the hardware sampler. 12. At least one non-transitory computer readable storage medium comprising a set of application instructions, which when executed by a computing system, cause the computing system to: identify accessed texels in a texture based on coordinates of the accessed texels in a resource paired with the texture; and read mip region data in a feedback map based on the accessed texels to perform sampling operations with respect to the texture through an instruction that specifies the texture, a hardware sampler to read the mip region data, and the coordinates of the accessed texels. 13. The at least one non-transitory computer readable storage medium of claim 12 , wherein the set of application instructions, when executed, further cause the computing system to initiate a filter operation with respect to the mip region data. 14. The at least one non-transitory computer readable storage medium of claim 13 , wherein the set of application instructions, when executed, further cause the computing system to compensate, based on a result of the filter operation, for one or more texels that have not been generated. 15. The at least one non-transitory computer readable storage medium of claim 13 , wherein to initiate the filter operation, the set of application instructions, when executed, cause the computing system to send a request to the hardware sampler. 16. A method comprising: identifying accessed texels in a texture based on coordinates of the accessed texels in a resource paired with the texture; and reading mip region data in a feedback map based on the accessed texels to perform sampling operations with respect to the texture through an instruction that specifies the texture, a hardware sampler to read the mip region data, and the coordinates of the accessed texels. 17. The method of claim 16 , further including initiating a filter operation with respect to the mip region data. 18. The method of claim 17 , further including compensating, based on a result of the filter operation, for one or more texels that have not been generated. 19. The method of claim 17 , wherein initiating the filter operation includes sending a request to the hardware sampler.

Assignees

Inventors

Classifications

  • G06T15/005Primary

    General purpose rendering architectures · CPC title

  • G06T1/20Primary

    Processor architectures; Processor configuration, e.g. pipelining · CPC title

  • using local operators · CPC title

  • G06T15/04Primary

    Texture mapping · CPC title

  • Level of detail · CPC title

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Frequently asked questions

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What does patent US12430838B2 cover?
Methods, systems and apparatuses may provide for technology that reads data from a sampler feedback resource based on coordinates relative to a paired texture that was used to generate the sampler feedback data.
Who is the assignee on this patent?
Intel Corp
What technology area does this patent fall under?
Primary CPC classification G06T15/005. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Sep 30 2025 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 3 related publications on this page (citations in our corpus or others sharing the same primary CPC).