Resource management controller

US12430172B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-12430172-B2
Application numberUS-202117481940-A
CountryUS
Kind codeB2
Filing dateSep 22, 2021
Priority dateSep 22, 2021
Publication dateSep 30, 2025
Grant dateSep 30, 2025

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

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Abstract

Official abstract text for this publication.

An embodiment of an electronic apparatus may comprise one or more substrates, and a controller coupled to the one or more substrates, the controller including circuitry to read utilization-related information for a resource from a memory shared with a processor in response to a request from the processor for the resource, and schedule utilization of the resource based at least in part on the utilization-related information for the resource. Other embodiments are disclosed and claimed.

First claim

Opening claim text (preview).

What is claimed is: 1. An electronic apparatus, comprising: one or more substrates; and a controller coupled to the one or more substrates, the controller including circuitry to: receive, from a processor, a request to handle a page fault; based on the request, read utilization-related information for a resource from a memory which is to be shared by the circuitry and the processor, wherein the utilization-related information is to comprise run-time telemetry for the resource, and wherein the memory is further to provide memory map information; and issue a command, to a dispatch queue, to schedule a utilization of the resource based on each of the utilization-related information for the resource and a first priority of an application to be executed with the processor. 2. The electronic apparatus of claim 1 , wherein the circuitry is further to: schedule utilization of the resource based on a second priority associated with the request and the utilization-related information for the resource. 3. The electronic apparatus of claim 1 , wherein the circuitry is further to: determine if the utilization of the resource responsive to the request from the processor is complete; and, if so determined, notify the processor that the request is completed. 4. The electronic apparatus of claim 1 , wherein the circuitry is further to: interface with an agent to schedule resource utilization of a remote resource. 5. The electronic apparatus of claim 1 , wherein the circuitry is further to: read run-time bandwidth information from the memory for two or more resources in response to the request from the processor; and perform an on-the-fly selection among the two or more resources based on the run-time bandwidth information. 6. The electronic apparatus of claim 1 , wherein the circuitry is further to: read run-time internal resource utilization information from the memory for a non-volatile memory in response to the request from the processor; and schedule utilization of the non-volatile memory based on a second priority associated with the request and the run-time internal resource utilization information for the non-volatile memory. 7. An electronic system, comprising: a processor; memory communicatively coupled to the processor; and a controller communicatively coupled to the processor and the memory, the controller including circuitry to: receive, from the processor, a request to handle a page fault; based on the request, read utilization-related information for a resource from the memory, wherein the memory is to be shared by the circuitry and the processor, wherein the utilization-related information is to comprise run-time telemetry for the resource, and wherein the memory is further to provide memory map information; and issue a command, to a dispatch queue, to schedule a utilization of the resource based on each of the utilization-related information for the resource and a first priority of an application to be executed with the processor. 8. The electronic system of claim 7 , wherein the circuitry is further to: schedule utilization of the resource based on a second priority associated with the request and the utilization-related information for the resource. 9. The electronic system of claim 7 , wherein the circuitry is further to: interface with an agent to schedule resource utilization of a remote resource. 10. The electronic system of claim 7 , wherein the circuitry is further to: read run-time internal resource utilization information from the memory for a non-volatile memory in response to the request from the processor; and schedule utilization of the non-volatile memory based on a second priority associated with the request and the run-time internal resource utilization information for the non-volatile memory. 11. A method at a controller, the method comprising: receiving, from a processor, a request to handle a page fault; based on the request, reading utilization-related information for a resource from a memory which is to be shared by the controller and the processor, wherein the utilization-related information comprises run-time telemetry for the resource, and wherein the memory further provides memory map information; and issuing a command, to a dispatch queue, to schedule a utilization of the resource based on each of the utilization-related information for the resource and a first priority of an application executed with the processor. 12. The method of claim 11 , further comprising: scheduling utilization of the resource based on a second priority associated with the request and the utilization-related information for the resource. 13. The method of claim 11 , further comprising: interfacing with an agent to schedule resource utilization of a remote resource. 14. The method of claim 11 , further comprising: reading run-time bandwidth information from the memory for two or more resources in response to the request from the processor; and performing an on-the-fly selection among the two or more resources based on the run-time bandwidth information.

Assignees

Inventors

Classifications

  • Buffers; Shared memory; Pipes · CPC title

  • using a common memory, e.g. mailbox · CPC title

  • G06F9/5005Primary

    to service a request · CPC title

  • G06F9/5016Primary

    the resource being the memory · CPC title

Patent family

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External sources

Frequently asked questions

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What does patent US12430172B2 cover?
An embodiment of an electronic apparatus may comprise one or more substrates, and a controller coupled to the one or more substrates, the controller including circuitry to read utilization-related information for a resource from a memory shared with a processor in response to a request from the processor for the resource, and schedule utilization of the resource based at least in part on the ut…
Who is the assignee on this patent?
Intel Corp
What technology area does this patent fall under?
Primary CPC classification G06F9/5005. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Sep 30 2025 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 5 related publications on this page (citations in our corpus or others sharing the same primary CPC).