Digital-to-time converter (DTC) non-linearity predistortion

Patent metadata

Field	Value
Publication number	US-12429829-B2
Application number	US-202117556457-A
Country	US
Kind code	B2
Filing date	Dec 20, 2021
Priority date	Dec 20, 2021
Publication date	Sep 30, 2025
Grant date	Sep 30, 2025

Abstract

A method for compensating signal nonlinearities includes generating a local oscillator (LO) signal and performing phase modulation of the LO signal to generate a phase-modulated LO signal. The phase modulation is based on applying at least one digital-to-time converter (DTC) code of a plurality of DTC codes to a rising edge signal portion and a falling edge signal portion associated with the LO signal. Nonlinearities associated with the rising edge signal portion and the falling edge signal portion are determined. The at least one DTC code is adjusted based on the nonlinearities.

First claim

What is claimed is:

1. An apparatus for a communication device, the apparatus comprising:
a digital-to-time converter (DTC) circuit to perform phase modulation of a local oscillator (LO) signal to generate a phase-modulated LO signal, wherein to perform the phase modulation, the DTC circuit is to:
detect a rising edge signal portion and a falling edge signal portion associated with the LO signal;
apply a first DTC code of a plurality of DTC codes to the rising edge signal portion;
apply a second DTC code of the plurality of DTC codes to the falling edge signal portion, the plurality of DTC codes corresponding to a plurality of phases associated with the phase modulation; and
generate a plurality of additional phase-modulated LO signals using a subset of the plurality of DTC codes; and

a calibration circuit, the calibration circuit to:
adjust at least one of the first DTC code and the second DTC code based on nonlinearities associated with the rising edge signal portion and the falling edge signal portion.

2. The apparatus of claim 1 , wherein the subset causes signal phase shifts of the LO signal corresponding to a full period.

3. The apparatus of claim 2 , further comprising:
a loop-back circuit configured to:
sample the plurality of additional phase-modulated LO signals; and
generate a plurality of digital baseband signals corresponding to the sampled plurality of additional phase-modulated LO signals.

4. The apparatus of claim 3 , wherein the calibration circuit is to:
determine a plurality of resulting integral non-linearity (INL) errors corresponding to the plurality of digital baseband signals.

5. The apparatus of claim 4 , wherein each resulting INL error of the plurality of resulting INL errors for a corresponding digital baseband signal of the plurality of digital baseband signals is a sum of INL errors,
wherein the INL errors are associated with a rising edge signal portion and a falling edge signal portion of a corresponding one of the plurality of additional phase-modulated LO signals.

6. The apparatus of claim 5 , wherein the calibration circuit is to:
determine the INL errors for each of the plurality of resulting INL errors based on a matrix associated with usage of the subset of the plurality of DTC codes to generate the plurality of phase-modulated LO signals.

7. The apparatus of claim 6 , wherein the calibration circuit is to:
retrieve an INL error of the determined INL errors for each of the plurality of resulting INL errors based on a phase of the plurality of phases corresponding to the first DTC code and the second DTC code; and
adjust the at least one of the first DTC code and the second DTC code based on the retrieved INL error.

8. The apparatus of claim 1 , further comprising a power amplifier, wherein the DTC circuit adjusts the at least one of the first DTC code and the second DTC code prior to signal amplification by the power amplifier, and wherein the DTC circuit is to:
generate the phase-modulated LO signal based on the first DTC code being equal to the second DTC code.

9. The apparatus of claim 8 , wherein to generate a subsequent phase-modulated LO signal, the DTC circuit is to:
select the first DTC code to be different from the second DTC code; and
toggle usage of the first DTC code and the second DTC code to generate the subsequent phase-modulated LO signal.

10. A method for compensating signal nonlinearities, the method comprising:
generating a local oscillator (LO) signal;
performing phase modulation of the LO signal to generate a phase-modulated LO signal, the phase modulation based on applying at least one digital-to-time converter (DTC) code of a plurality of DTC codes to a rising edge signal portion and a falling edge signal portion associated with the LO signal;
determining nonlinearities associated with the rising edge signal portion and the falling edge signal portion;
adjusting the at least one DTC code based on the nonlinearities; and
generating a plurality of additional phase-modulated LO signals using a subset of the plurality of DTC codes.

11. The method of claim 10 , wherein performing the phase-modulation comprises:
detecting the rising edge signal portion and the falling edge signal portion associated with the LO signal;
applying a first DTC code of the plurality of DTC codes to the rising edge signal portion; and
applying a second DTC code of the plurality of DTC codes to the falling edge signal portion, the plurality of DTC codes corresponding to a plurality of phases associated with the phase modulation.

12. The method of claim 11 , further comprising:
generating the phase-modulated LO signal based on the first DTC code being equal to the second DTC code.

13. The method of claim 12 , further comprising:
generating a subsequent phase-modulated LO signal, the generating of the subsequent phase-modulated LO signal comprising:
selecting the first DTC code to be different from the second DTC code; and
toggling usage of the first DTC code and the second DTC code to generate the subsequent phase-modulated LO signal.

14. The method of claim 10 , wherein the subset causes signal phase shifts of the LO signal corresponding to a full period.

15. The method of claim 14 , further comprising:
sampling the plurality of additional phase-modulated LO signals; and
generating a plurality of digital baseband signals corresponding to the sampled plurality of additional phase-modulated LO signals.

16. The method of claim 15 , further comprising:
determining a plurality of resulting integral non-linearity (INL) errors corresponding to the plurality of digital baseband signals;
wherein each resulting INL error of the plurality of resulting INL errors for a corresponding digital baseband signal of the plurality of digital baseband signals is a sum of INL errors; and
wherein the INL errors are associated with a rising edge signal portion and a falling edge signal portion of a corresponding one of the plurality of additional phase-modulated LO signals.

17. The method of claim 16 , further comprising:
determining the INL errors for each of the plurality of resulting INL errors based on a matrix associated with usage of the subset of the plurality of DTC codes to generate the plurality of additional phase-modulated LO signals.

18. The method of claim 17 , further comprising:
retrieving an INL error of the determined INL errors for each of the plurality of resulting INL errors based on a phase of the plurality of phases corresponding to the subset; and
adjusting the DTC code based on the retrieved INL error.

19. At least one non-transitory machine-readable storage medium comprising instructions stored thereupon, which when executed by processing circuitry of a wireless device, cause the processing circuitry to perform operations comprising:
generating a local oscillator (LO) signal;
performing phase modulation of the LO signal to generate a phase-modulated LO signal, the phase modulation based on applying at least one digital-to-time converter (DTC) code of a plurality of DTC codes to a rising edge signal portion and a falling edge signal portion associated with the LO signal;
determining nonlinearities associated with the rising edge signal portion and the falling edge signal portion;
adjusting the at least one DTC code based on the nonlinearities; and
generating a plurality of additional phase-modulated LO signals using a subset of the plurality of DTC codes.

20. The at least one non-transitory machine-readable stora

Assignees

• Intel Corp

Inventors

• Ben-Bassat Assaf
• Degani Ofir
• Banin Elan
• Gross Shahar
• Skliar Phillip

Classifications

• H03M1/84

  Non-linear conversion · CPC title

• G04F10/005 Primary

  Time-to-digital converters [TDC] (analog-to-digital converters with intermediate conversion to time or phase H03M1/50, H03M1/60) · CPC title

• H03M1/82

  with intermediate conversion to time interval · CPC title

• H04B1/0082 Primary

  with a common local oscillator for more than one band · CPC title