Infrared detector having vertical sidewall sensitive layer and manufacturing method thereof

Patent metadata

Field	Value
Publication number	US-12426389-B2
Application number	US-201716624907-A
Country	US
Kind code	B2
Filing date	Jun 30, 2017
Priority date	Jun 29, 2017
Publication date	Sep 23, 2025
Grant date	Sep 23, 2025

Abstract

The present disclosure provided an infrared detector having a vertical sidewall sensitive layer and a manufacturing method thereof. By forming at least one fin structure on a semiconductor substrate; and a sensitive layer can be formed on the sidewall of the fin structure by ion implantation. The vertical sidewall sensitive layer is configured to reduce the impact of lithography on the sensitive layer, thereby reducing the impact on the sensitivity of the sensitive layer (03).

First claim

What is claimed is:

1. An infrared detector, comprising:
at least one fin structure, as a non-doped structure, configured to have an upper wall, a bottom wall and a side wall thereof, wherein the side wall is configured to extend from the upper wall towards the bottom wall of the at least one fin structure;
an upper electrode layer disposed on the upper wall of the at least one fin structure;
a lower electrode layer spaced from the upper electrode layer and disposed on the bottom wall of the at least one fin structure; and
a sensitive layer, as a doped layer, located on the sidewall of the at least one fin structure and configured to electrically connect the upper electrode layer and the lower electrode layer.

2. The infrared detector of claim 1 , wherein the at least one fin structure comprises a plurality of parallel fins in a first direction and a fin in a second direction; a plurality of terminals of the fins in the first direction are connected to the fin in the second direction; the first direction and the second direction are perpendicular to each other.

3. The infrared detector of claim 2 , wherein the at least one fin structure is M-shaped, U-shaped or comb-teeth shaped.

4. The infrared detector of claim 2 , wherein, a lower electrode layer is located at the bottom of the at least one fin structure, and the lower electrode layer is in contact with the bottom of the sensitive layer; and an upper electrode layer is located above the at least one fin structure, and the upper electrode layer is in contact with the top of the sensitive layer.

5. The infrared detector of claim 4 , wherein a part of one sidewall of the at least one fin structure in the second direction is not provided with the sensitive layer, and an output terminal of the upper electrode layer is connected with an edge of the upper electrode layer and is adjacent to the sidewall of the at least one fin structure which is not provided with the sensitive layer in the second direction extending to the surface of a semiconductor substrate; and the bottom of the output terminal of the upper electrode layer is not in contact with the lower electrode layer.

6. The infrared detector of claim 4 , wherein the sensitive layer is further located on the top of the at least one fin structure.

7. The infrared detector of claim 2 , wherein the sensitive layer is only located on the sidewall of the at least one fin structure, and the sensitive layer is surroundingly attached to the at least one fin structure, wherein the sensitive layer is provided with an opening so that terminals of the sensitive layer on two sides of the opening are formed.

8. The infrared detector of claim 7 , wherein the sensitive layer is attached to the inner sidewall and the outer sidewall of the at least one fin structure and is not arranged on the sidewall of the fin in the second direction.

9. The infrared detector of claim 7 , wherein a barrier layer formed by ion implantation is further arranged on the top of the at least one fin structure.

10. The infrared detector of claim 2 , wherein the sidewalls of the plurality of fins of the fin structure surrounded by the sensitive layer are physically connected to each other and form a continuous film layer.

11. A manufacturing method of an infrared detector, comprising the following steps:
Step 01 , providing a semiconductor substrate;
Step 02 , preparing a lower electrode layer on the surface of the semiconductor substrate;
Step 03 , preparing at least one fin structure, as a non-doped structure, on the lower electrode layer;
Step 04 , forming a sensitive layer, as a doped layer, on a sidewall of the at least one fin structure;
Step 05 , forming an upper electrode layer above the at least one fin structure, wherein the upper electrode layer is in contact with the top of the sensitive layer, wherein the sensitive layer is configured to electrically connect the upper electrode layer and the lower electrode layer.

12. The manufacturing method of the infrared detector of claim 11 , wherein in the step 03 , the fin structure is prepared by an etching process, and the fin structure comprises a plurality of parallel fins in a first direction and a fin in a second direction, a plurality of terminals of the fins in the first direction are connected to the fin in the second direction; the first direction and the second direction are perpendicular to each other.

13. The manufacturing method of the infrared detector of claim 12 , wherein the step 04 comprises:
firstly, depositing the sensitive layer on the sidewall and the top of the fin;
then, etching to remove a part of the sensitive layer of the outer sidewall of the fin in the second direction, and exposing the outer sidewall of the fin in the second direction.

14. The manufacturing method of the infrared detector of claim 13 , wherein the step 05 comprises:
firstly, depositing an upper electrode layer on the semiconductor substrate of the step 04 ;
then, etching to remove the upper electrode layer on the sidewall of the sensitive layer and a part of the upper electrode layer on the surface of the semiconductor substrate; and
reserving the upper electrode layer on the top of the sensitive layer and the top of the fin structure, and the upper electrode layer of the outer sidewall is exposed by the fin in the second direction, thereby forming an upper electrode layer pattern and forming a output terminal pattern of the upper electrode layer.

15. The manufacturing method of the infrared detector of claim 11 , wherein in the step 04 , during etching, the sensitive layer located on the top of the fin structure is also removed.

16. A manufacturing method of an infrared detector, comprising the following steps:
Step 01 , forming at least one fin structure as a non-doped structure;
Step 02 , forming a sensitive layer, as a doped layer, on all sidewalls of the at least one fin structure;
Step 03 , etching the sensitive layers on a part of the sidewalls of the at least one fin structure, and etching an opening in the sensitive layer so that the sensitive layer is provided with two terminals, the two terminals are not in contact, and the sidewalls of a part of the at least one fin structures are exposed through the opening;
Step 04 , forming a first electrode layer and a second electrode layer on the two terminals respectively so that the sensitive layer is configured to connect the first electrode layer with the second electrode layer, wherein the first electrode layer and the second electrode layer are not in contact.

17. The manufacturing method of the infrared detector of claim 16 , wherein between the step 01 and the step 02 , the method further comprises: performing an ion implantation on the top of the fin structure to form a barrier layer.

18. The manufacturing method of the infrared detector of claim 16 , wherein the step 04 comprises: firstly, forming an electrode material layer on the top of the fin structure, the exposed sidewall of the fin structure, and the top and the sidewall of the sensitive layer; then, etching the electrode material layer to form the first electrode layer and the second electrode layer, the first electrode layer and the second electrode layer are not in contact.

19. The manufacturing method of the infrared detector of claim 16 , wherein in step 03 , the width of the formed opening is smaller than or equal to the distance between the first electrode layer and the second electrode layer.

Assignees

• Shanghai Ic R&D Ct Co Ltd

Inventors

• Kang Xiaoxu

Classifications

• H10F39/80 Primary

  Constructional details of image sensors · CPC title

• H10F39/014

  of CMOS image sensors · CPC title

• G01J5/20

  using resistors, thermistors or semiconductors sensitive to radiation, e.g. photoconductive devices · CPC title

• G01J5/024

  Special manufacturing steps or sacrificial layers or layer structures · CPC title

• G01J5/10

  using electric radiation detectors · CPC title